Tim Northover d59fc0af0a ARM: relax the atomic release barrier to "dmb ishst"
I believe the full "dmb ish" barrier is not required to guarantee release
semantics for atomic operations. The weaker "dmb ishst" prevents previous
operations being reordered with a store executed afterwards, which is enough.

A key point to note (fortunately already correct) is that this barrier alone is
*insufficient* for sequential consistency, no matter how liberally placed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185339 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-01 14:48:48 +00:00
2013-05-07 20:31:28 +00:00
2013-06-28 23:24:10 +00:00
2013-06-18 22:09:36 +00:00
2013-04-17 05:34:03 +00:00

Low Level Virtual Machine (LLVM)
================================

This directory and its subdirectories contain source code for the Low Level
Virtual Machine, a toolkit for the construction of highly optimized compilers,
optimizers, and runtime environments.

LLVM is open source software. You may freely distribute it under the terms of
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Please see the documentation provided in docs/ for further
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started with LLVM and docs/README.txt for an overview of LLVM's
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LLVM backend for 6502
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