llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-02-06 06:33:24 +00:00

History

Tim Northover d59fc0af0a ARM: relax the atomic release barrier to "dmb ishst"

I believe the full "dmb ish" barrier is not required to guarantee release
semantics for atomic operations. The weaker "dmb ishst" prevents previous
operations being reordered with a store executed afterwards, which is enough.

A key point to note (fortunately already correct) is that this barrier alone is
*insufficient* for sequential consistency, no matter how liberally placed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185339 91177308-0d34-0410-b5e6-96231b3b80d8

2013-07-01 14:48:48 +00:00

Analysis

Minimize precision loss when computing cyclic probabilities.

2013-06-28 22:40:43 +00:00

Archive

Fix an ordering problem in the test.

2013-06-21 07:23:14 +00:00

Assembler

Added support for the Builtin attribute.

2013-06-27 00:25:01 +00:00

Bindings/Ocaml

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