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llvm-6502/test/CodeGen/PowerPC
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Daniel Dunbar d60054e512 Convert two gratuitous abuses of poor helpless CPU cycles to FileCheck. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79933 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-24 20:08:27 +00:00
..
2004-11-29-ShrCrash.ll
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2004-11-30-shift-crash.ll
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2004-11-30-shr-var-crash.ll
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2004-12-12-ZeroSizeCommon.ll
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2005-01-14-SetSelectCrash.ll
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2005-01-14-UndefLong.ll
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2005-08-12-rlwimi-crash.ll
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2005-09-02-LegalizeDuplicatesCalls.ll
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2005-10-08-ArithmeticRotate.ll
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2005-11-30-vastart-crash.ll
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2006-01-11-darwin-fp-argument.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2006-01-20-ShiftPartsCrash.ll
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2006-04-01-FloatDoubleExtend.ll
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2006-04-05-splat-ish.ll
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2006-04-19-vmaddfp-crash.ll
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2006-05-12-rlwimi-crash.ll
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2006-07-07-ComputeMaskedBits.ll
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2006-07-19-stwbrx-crash.ll
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2006-08-11-RetVector.ll
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2006-08-15-SelectionCrash.ll
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2006-09-28-shift_64.ll
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2006-10-11-combiner-aa-regression.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2006-10-13-Miscompile.ll
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2006-10-17-brcc-miscompile.ll
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2006-10-17-ppc64-alloca.ll
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2006-11-10-DAGCombineMiscompile.ll
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2006-11-29-AltivecFPSplat.ll
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2006-12-07-LargeAlloca.ll
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2006-12-07-SelectCrash.ll
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2007-01-04-ArgExtension.ll
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2007-01-15-AsmDialect.ll
add nounwind
2009-08-12 05:44:03 +00:00
2007-01-29-lbrx-asm.ll
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2007-01-31-InlineAsmAddrMode.ll
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2007-02-16-AlignPacked.ll
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2007-02-16-InlineAsmNConstraint.ll
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2007-02-23-lr-saved-twice.ll
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2007-03-24-cntlzd.ll
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2007-03-30-SpillerCrash.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2007-04-24-InlineAsm-I-Modifier.ll
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2007-04-30-InlineAsmEarlyClobber.ll
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2007-05-03-InlineAsm-S-Constraint.ll
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2007-05-14-InlineAsmSelectCrash.ll
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2007-05-22-tailmerge-3.ll
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2007-05-30-dagcombine-miscomp.ll
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2007-06-28-BCCISelBug.ll
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2007-08-04-CoalescerAssert.ll
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2007-09-04-AltivecDST.ll
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2007-09-07-LoadStoreIdxForms.ll
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2007-09-08-unaligned.ll
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2007-09-11-RegCoalescerAssert.ll
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2007-09-12-LiveIntervalsAssert.ll
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2007-10-16-InlineAsmFrameOffset.ll
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2007-10-18-PtrArithmetic.ll
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2007-10-21-LocalRegAllocAssert2.ll
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2007-10-21-LocalRegAllocAssert.ll
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2007-11-04-CoalescerCrash.ll
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2007-11-16-landingpad-split.ll
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2007-11-19-VectorSplitting.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2008-01-25-EmptyFunction.ll
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2008-02-05-LiveIntervalsAssert.ll
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2008-02-09-LocalRegAllocAssert.ll
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2008-03-05-RegScavengerAssert.ll
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2008-03-06-KillInfo.ll
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2008-03-17-RegScavengerCrash.ll
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2008-03-18-RegScavengerAssert.ll
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2008-03-24-AddressRegImm.ll
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2008-03-24-CoalescerBug.ll
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2008-03-26-CoalescerBug.ll
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2008-04-10-LiveIntervalCrash.ll
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2008-04-16-CoalescerBug.ll
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2008-04-23-CoalescerCrash.ll
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2008-05-01-ppc_fp128.ll
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2008-06-19-LegalizerCrash.ll
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2008-06-21-F128LoadStore.ll
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2008-06-23-LiveVariablesCrash.ll
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2008-07-10-SplatMiscompile.ll
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2008-07-15-Bswap.ll
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2008-07-15-Fabs.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2008-07-15-SignExtendInreg.ll
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2008-07-17-Fneg.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2008-07-24-PPC64-CCBug.ll
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2008-09-12-CoalescerBug.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2008-10-17-AsmMatchingOperands.ll
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2008-10-28-f128-i32.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2008-10-28-UnprocessedNode.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2008-10-30-IllegalShift.ll
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2008-10-31-PPCF128Libcalls.ll
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2008-12-02-LegalizeTypeAssert.ll
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2008-12-12-EH.ll
Revert 78892 and 78895, these break generating working executables on
2009-08-13 17:03:38 +00:00
2009-01-16-DeclareISelBug.ll
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2009-03-17-LSRBug.ll
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2009-05-28-LegalizeBRCC.ll
Add explicit test for PR4280.
2009-05-28 21:04:35 +00:00
2009-07-16-InlineAsm-M-Operand.ll
Teach MachineInstr::isRegTiedToDefOperand() to correctly parse inline asm operands.
2009-07-16 20:58:34 +00:00
2009-08-17-inline-asm-addr-mode-breakage.ll
PowerPC inline asm was emitting two output operands
2009-08-18 00:18:39 +00:00
2009-08-23-linkerprivate.ll
Split test into 3.
2009-08-24 17:51:19 +00:00
addc.ll
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addi-reassoc.ll
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align.ll
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and_add.ll
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and_sext.ll
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and_sra.ll
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and-branch.ll
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and-elim.ll
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and-imm.ll
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atomic-1.ll
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atomic-2.ll
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Atomics-32.ll
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Atomics-64.ll
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available-externally.ll
Make the big switch: Change MCSectionMachO to represent a section *semantically*
2009-08-10 01:39:42 +00:00
big-endian-actual-args.ll
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big-endian-call-result.ll
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big-endian-formal-args.ll
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branch-opt.ll
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bswap-load-store.ll
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buildvec_canonicalize.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
calls.ll
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cmp-cmp.ll
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compare-duplicate.ll
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compare-simm.ll
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constants.ll
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cr_spilling.ll
Second attempt:
2009-04-29 00:15:41 +00:00
cttz.ll
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darwin-labels.ll
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delete-node.ll
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dg.exp
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div-2.ll
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eqv-andc-orc-nor.ll
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extsh.ll
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fabs.ll
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fma.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
fnabs.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
fneg.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
fold-li.ll
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fp_to_uint.ll
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fp-branch.ll
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fp-int-fp.ll
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fpcopy.ll
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Frames-alloca.ll
Convert two gratuitous abuses of poor helpless CPU cycles to FileCheck.
2009-08-24 20:08:27 +00:00
Frames-large.ll
Convert two gratuitous abuses of poor helpless CPU cycles to FileCheck.
2009-08-24 20:08:27 +00:00
Frames-leaf.ll
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Frames-small.ll
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frounds.ll
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fsqrt.ll
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hello.ll
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hidden-vis-2.ll
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hidden-vis.ll
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i64_fp.ll
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i128-and-beyond.ll
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iabs.ll
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illegal-element-type.ll
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inlineasm-copy.ll
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int-fp-conv-0.ll
Don't grep the -debug output. This isn't the way to test changes.
2009-06-25 21:59:32 +00:00
int-fp-conv-1.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
invalid-memcpy.ll
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inverted-bool-compares.ll
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ispositive.ll
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itofp128.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
LargeAbsoluteAddr.ll
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lha.ll
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load-constant-addr.ll
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long-compare.ll
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longdbl-truncate.ll
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mask64.ll
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mem_update.ll
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mem-rr-addr-mode.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
mul-neg-power-2.ll
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mul-with-overflow.ll
Add some generic expansion logic for SMULO and UMULO. Fixes UMULO
2009-06-16 06:58:29 +00:00
mulhs.ll
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multiple-return-values.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
neg.ll
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no-dead-strip.ll
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or-addressing-mode.ll
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ppcf128-1-opt.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
ppcf128-1.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
ppcf128-2.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
ppcf128-3.ll
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ppcf128-4.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
pr3711_widen_bit.ll
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private.ll
Rerevert (r75663 and r76805), seems there is more non-determinism.
2009-08-23 17:26:24 +00:00
reg-coalesce-simple.ll
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retaddr.ll
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return-val-i128.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
rlwimi2.ll
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rlwimi3.ll
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rlwimi-commute.ll
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rlwimi.ll
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rlwinm2.ll
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rlwinm.ll
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rotl-2.ll
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rotl-64.ll
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rotl.ll
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sections.ll
Remove HasCrazyBSS and add a flag in TAI to indicate that '.section'
2009-08-13 23:30:21 +00:00
select_lt0.ll
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select-cc.ll
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setcc_no_zext.ll
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seteq-0.ll
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shift128.ll
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shl_elim.ll
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shl_sext.ll
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sign_ext_inreg1.ll
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small-arguments.ll
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stfiwx-2.ll
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stfiwx.ll
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store-load-fwd.ll
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subc.ll
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tailcall1-64.ll
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tailcall1.ll
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tailcallpic1.ll
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tango.net.ftp.FtpClient.ll
Check in a reduced version of this testcase.
2009-07-13 23:04:44 +00:00
trampoline.ll
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unsafe-math.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
vcmp-fold.ll
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vec_br_cmp.ll
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vec_call.ll
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vec_constants.ll
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vec_fneg.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
vec_insert.ll
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vec_misaligned.ll
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vec_mul.ll
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vec_perf_shuffle.ll
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vec_shift.ll
PR3628: Add patterns to match SHL/SRL/SRA to the corresponding Altivec
2009-06-07 01:07:55 +00:00
vec_shuffle.ll
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vec_splat.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
vec_vrsave.ll
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vec_zero.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
vector-identity-shuffle.ll
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vector.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00