Kalle Raiskila 43d225dc8b Fix SPU to cope with vector insertelement to an undef position. ...

We default to inserting to lane 0.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105722 91177308-0d34-0410-b5e6-96231b3b80d8

2010-06-09 09:58:17 +00:00

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Alpha

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ARM

Re-apply 105308 with fix.

2010-06-04 23:28:13 +00:00

Blackfin

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CBackend

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CellSPU

Fix SPU to cope with vector insertelement to an undef position.

2010-06-09 09:58:17 +00:00

CPP

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Generic

Implement expansion in type legalization for add/sub with overflow. The

2010-06-03 03:49:50 +00:00

MBlaze

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Mips

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MSP430

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PIC16

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PowerPC

Fix some latency computation bugs: if the use is not a machine opcode do not just return zero.

2010-05-28 23:26:21 +00:00

SPARC

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SystemZ

SystemZ really does mean "has calls" and not just "adjusts stack." Go ahead and

2010-05-14 22:17:42 +00:00

Thumb

Enable a bunch more -regalloc=fast tests

2010-05-12 00:11:24 +00:00

Thumb2

More tail call removal.

2010-06-04 21:14:24 +00:00

X86

LSR needs to remember inserted instructions even in postinc mode, because

2010-06-05 00:33:07 +00:00

XCore

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