Chris Lattner c4fa603347 Port some bugfixes in shift handling from SimplifyDemandedBits over to ...

ComputeMaskedBits.  DemandedMasks and KnownZero/One masks should never have
bits set out of the range of the base datatype.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28768 91177308-0d34-0410-b5e6-96231b3b80d8

2006-06-13 16:52:37 +00:00

..

DAGCombiner.cpp

Start on my todo list

2006-06-12 16:07:18 +00:00

LegalizeDAG.cpp

Change RET node to include signness information of the return values. e.g.

2006-05-26 23:09:09 +00:00

Makefile

Use archive libraries instead of object files for VMCore, BCReader,

2006-06-01 01:30:27 +00:00

ScheduleDAG.cpp

commuteInstruction() does not always create a new MI!

2006-05-31 18:03:39 +00:00

ScheduleDAGList.cpp

When a priority_queue is empty, the behavior of top() operator is

2006-05-30 18:04:34 +00:00

ScheduleDAGRRList.cpp

Make sure the register pressure reduction schedulers work for non-uniform

2006-05-30 18:05:39 +00:00

ScheduleDAGSimple.cpp

…

SelectionDAG.cpp

Add a new ISD::CALL node, make the default impl of TargetLowering::LowerCallTo

2006-05-16 22:53:20 +00:00

SelectionDAGISel.cpp

Make sure to update the CFG correctly if a switch only has a default dest.

2006-06-12 18:25:29 +00:00

SelectionDAGPrinter.cpp

For PR798:

2006-06-05 16:26:06 +00:00

TargetLowering.cpp

Port some bugfixes in shift handling from SimplifyDemandedBits over to

2006-06-13 16:52:37 +00:00