Jakob Stoklund Olesen d9c1fa5205 Remove the TRI::getSubRegisterRegClass() hook. ...

This restores my karma after I added TRI::getSubClassWithSubReg().

Register constraints are applied 'backwards'.  Starting from the
register class required by an instruction operand, the correct question
is: 'How can I constrain the super-register register class so all its
sub-registers satisfy the instruction constraint?' The
getMatchingSuperRegClass() hook answers that.

We never need to go 'forwards': Starting from a super-register register
class, what register class are the sub-registers in?  The
getSubRegisterRegClass() hook did that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141258 91177308-0d34-0410-b5e6-96231b3b80d8

2011-10-06 00:08:27 +00:00

..

Mangler.h

Remove std::string version of getNameWithPrefix.

2011-02-11 05:23:09 +00:00

Target.td

Follow up to r138791.

2011-08-30 19:09:48 +00:00

TargetCallingConv.h

Inside the calling convention logic LocVT is always a simple

2010-11-03 11:35:31 +00:00

TargetCallingConv.td

Fix a couple of typos.

2010-08-27 21:38:11 +00:00

TargetData.h

Convert TargetData::getIndexedOffset to use ArrayRef.

2011-07-19 14:01:37 +00:00

TargetELFWriterInfo.h

Jim Asked us to move DataLayout on ARM back to the most specialized classes. Do

2010-10-03 18:59:45 +00:00

TargetFrameLowering.h

Emit segmented-stack specific code into function prologues for

2011-08-30 19:39:58 +00:00

TargetInstrInfo.h

Expand the x86 V_SET0* pseudos right after register allocation.

2011-09-29 05:10:54 +00:00

TargetIntrinsicInfo.h

land David Blaikie's patch to de-constify Type, with a few tweaks.

2011-07-18 04:54:35 +00:00

TargetJITInfo.h

Merge System into Support.

2010-11-29 18:16:10 +00:00

TargetLibraryInfo.h

add a copy ctor to TargetLibraryInfo.

2011-05-21 20:09:13 +00:00

TargetLowering.h

Add codegen support for vector select (in the IR this means a select

2011-09-06 19:07:46 +00:00

TargetLoweringObjectFile.h

Goodbye TargetAsmInfo. This eliminate last bit of CodeGen and Target in llvm-mc.

2011-07-20 19:50:42 +00:00

TargetMachine.h

- Move CodeModel from a TargetMachine global option to MCCodeGenInfo.

2011-07-20 07:51:56 +00:00

TargetOpcodes.h

Change the REG_SEQUENCE SDNode to take an explict register class ID as its first operand. This operand is lowered away by the time we reach MachineInstrs, so the actual register-allocation handling of them doesn't need to change.

2011-06-16 18:17:13 +00:00

TargetOptions.h

Command line option to enable support for segmented stacks:

2011-08-30 19:29:02 +00:00

TargetRegisterInfo.h

Remove the TRI::getSubRegisterRegClass() hook.

2011-10-06 00:08:27 +00:00

TargetSchedule.td

Comments about operand cycles and pipeline forwarding pathes.

2010-09-30 22:01:50 +00:00

TargetSelectionDAG.td

CR fixes per Bruno's request.

2011-09-11 15:02:23 +00:00

TargetSelectionDAGInfo.h

reimplement memcpy/memmove/memset lowering to use MachinePointerInfo

2010-09-21 05:40:29 +00:00

TargetSubtargetInfo.h

Rename TargetSubtarget to TargetSubtargetInfo for consistency.

2011-07-01 21:01:15 +00:00