Andrew Lenharth 6e707fb39c fix short immediate loads ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25371 91177308-0d34-0410-b5e6-96231b3b80d8

2006-01-16 21:41:39 +00:00

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.cvsignore

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Alpha.h

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Alpha.td

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AlphaAsmPrinter.cpp

add br pattern, unify JSR and BSR ISel instrs, and add BSR support for DAG

2005-12-25 17:36:48 +00:00

AlphaCodeEmitter.cpp

massive DAGISel patch. lots and lots more stuff compiles now

2005-11-22 04:20:06 +00:00

AlphaInstrFormats.td

stack and rpcc

2006-01-16 21:22:38 +00:00

AlphaInstrInfo.cpp

whatever. Intermediate patch to see what breaks. Seems ok.

2005-11-09 19:17:08 +00:00

AlphaInstrInfo.h

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AlphaInstrInfo.td

fix short immediate loads

2006-01-16 21:41:39 +00:00

AlphaISelDAGToDAG.cpp

stack and rpcc

2006-01-16 21:22:38 +00:00

AlphaISelLowering.cpp

stack and rpcc

2006-01-16 21:22:38 +00:00

AlphaISelLowering.h

Friendly names

2006-01-16 19:53:25 +00:00

AlphaISelPattern.cpp

add br pattern, unify JSR and BSR ISel instrs, and add BSR support for DAG

2005-12-25 17:36:48 +00:00

AlphaJITInfo.cpp

Remove a 'using namespace std'.

2006-01-01 22:20:31 +00:00

AlphaJITInfo.h

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AlphaRegisterInfo.cpp

clean this function up some

2006-01-01 22:13:54 +00:00

AlphaRegisterInfo.h

whatever. Intermediate patch to see what breaks. Seems ok.

2005-11-09 19:17:08 +00:00

AlphaRegisterInfo.td

Support multiple ValueTypes per RegisterClass, needed for upcoming vector

2005-12-01 04:51:06 +00:00

AlphaRelocations.h

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AlphaSubtarget.cpp

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AlphaSubtarget.h

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AlphaTargetMachine.cpp

make DAG isel the default

2006-01-13 18:49:47 +00:00

AlphaTargetMachine.h

Add a new option to indicate we want the code generator to emit code quickly,not spending tons of time microoptimizing it. This is useful for an -O0style of build.

2005-11-08 02:11:51 +00:00

Makefile

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