mirror of
https://github.com/c64scene-ar/llvm-6502.git
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da308c9a67
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75921 91177308-0d34-0410-b5e6-96231b3b80d8
142 lines
4.0 KiB
C++
142 lines
4.0 KiB
C++
//==-- SystemZISelDAGToDAG.cpp - A dag to dag inst selector for SystemZ ---===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines an instruction selector for the SystemZ target.
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//
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//===----------------------------------------------------------------------===//
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#include "SystemZ.h"
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#include "SystemZISelLowering.h"
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#include "SystemZTargetMachine.h"
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#include "llvm/DerivedTypes.h"
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#include "llvm/Function.h"
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#include "llvm/Intrinsics.h"
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#include "llvm/CallingConv.h"
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#include "llvm/Constants.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/SelectionDAG.h"
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#include "llvm/CodeGen/SelectionDAGISel.h"
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#include "llvm/Target/TargetLowering.h"
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#include "llvm/Support/Compiler.h"
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#include "llvm/Support/Debug.h"
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using namespace llvm;
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/// SystemZDAGToDAGISel - SystemZ specific code to select SystemZ machine
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/// instructions for SelectionDAG operations.
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///
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namespace {
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class SystemZDAGToDAGISel : public SelectionDAGISel {
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SystemZTargetLowering &Lowering;
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const SystemZSubtarget &Subtarget;
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public:
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SystemZDAGToDAGISel(SystemZTargetMachine &TM, CodeGenOpt::Level OptLevel)
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: SelectionDAGISel(TM, OptLevel),
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Lowering(*TM.getTargetLowering()),
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Subtarget(*TM.getSubtargetImpl()) { }
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virtual void InstructionSelect();
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virtual const char *getPassName() const {
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return "SystemZ DAG->DAG Pattern Instruction Selection";
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}
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/// getI16Imm - Return a target constant with the specified value, of type
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/// i16.
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inline SDValue getI16Imm(uint64_t Imm) {
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return CurDAG->getTargetConstant(Imm, MVT::i16);
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}
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/// getI32Imm - Return a target constant with the specified value, of type
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/// i32.
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inline SDValue getI32Imm(uint64_t Imm) {
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return CurDAG->getTargetConstant(Imm, MVT::i32);
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}
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// Include the pieces autogenerated from the target description.
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#include "SystemZGenDAGISel.inc"
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private:
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SDNode *Select(SDValue Op);
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#ifndef NDEBUG
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unsigned Indent;
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#endif
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};
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} // end anonymous namespace
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/// createSystemZISelDag - This pass converts a legalized DAG into a
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/// SystemZ-specific DAG, ready for instruction scheduling.
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///
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FunctionPass *llvm::createSystemZISelDag(SystemZTargetMachine &TM,
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CodeGenOpt::Level OptLevel) {
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return new SystemZDAGToDAGISel(TM, OptLevel);
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}
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/// InstructionSelect - This callback is invoked by
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/// SelectionDAGISel when it has created a SelectionDAG for us to codegen.
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void SystemZDAGToDAGISel::InstructionSelect() {
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DEBUG(BB->dump());
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// Codegen the basic block.
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#ifndef NDEBUG
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DOUT << "===== Instruction selection begins:\n";
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Indent = 0;
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#endif
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SelectRoot(*CurDAG);
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#ifndef NDEBUG
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DOUT << "===== Instruction selection ends:\n";
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#endif
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CurDAG->RemoveDeadNodes();
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}
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SDNode *SystemZDAGToDAGISel::Select(SDValue Op) {
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SDNode *Node = Op.getNode();
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DebugLoc dl = Op.getDebugLoc();
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// Dump information about the Node being selected
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#ifndef NDEBUG
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DOUT << std::string(Indent, ' ') << "Selecting: ";
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DEBUG(Node->dump(CurDAG));
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DOUT << "\n";
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Indent += 2;
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#endif
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// If we have a custom node, we already have selected!
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if (Node->isMachineOpcode()) {
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#ifndef NDEBUG
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DOUT << std::string(Indent-2, ' ') << "== ";
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DEBUG(Node->dump(CurDAG));
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DOUT << "\n";
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Indent -= 2;
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#endif
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return NULL;
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}
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// Select the default instruction
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SDNode *ResNode = SelectCode(Op);
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#ifndef NDEBUG
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DOUT << std::string(Indent-2, ' ') << "=> ";
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if (ResNode == NULL || ResNode == Op.getNode())
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DEBUG(Op.getNode()->dump(CurDAG));
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else
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DEBUG(ResNode->dump(CurDAG));
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DOUT << "\n";
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Indent -= 2;
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#endif
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return ResNode;
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}
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