Andrew Lenharth daf4b0477f fix register names ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19971 91177308-0d34-0410-b5e6-96231b3b80d8

2005-02-01 20:34:29 +00:00

..

Alpha

fix register names

2005-02-01 20:34:29 +00:00

CBackend

Fix hyphenation in output comment

2005-01-31 06:19:57 +00:00

PowerPC

Fix Regression/CodeGen/PowerPC/2005-01-14-UndefLong.ll

2005-01-14 20:22:02 +00:00

Skeleton

ignore generated files

2004-11-21 00:01:54 +00:00

Sparc

Substantially improve the code generated by non-folded setcc instructions.

2005-01-01 16:06:57 +00:00

SparcV8

Substantially improve the code generated by non-folded setcc instructions.

2005-01-01 16:06:57 +00:00

SparcV9

Finegrainify namespacification.

2005-01-29 00:36:59 +00:00

X86

We can fold promoted and non-promoted loads into divs also!

2005-01-25 20:35:10 +00:00

Makefile

Build Alpha by default.

2005-01-23 04:34:46 +00:00

MRegisterInfo.cpp

Move destructor out of line to avoid vtable emission in every file that includes the header. Thanks to sabre.

2004-10-27 06:00:53 +00:00

Target.td

Add some bits that can be set for instructions.

2005-01-02 02:27:48 +00:00

TargetData.cpp

Initial support for packed types, contributed by Morten Ofstad

2004-12-01 17:14:28 +00:00

TargetFrameInfo.cpp

…

TargetInstrInfo.cpp

Finegrainify namespacification

2005-01-19 06:53:34 +00:00

TargetMachine.cpp

Add a new target-independent code generator flag.

2005-01-15 06:00:32 +00:00

TargetMachineRegistry.cpp

…

TargetSchedInfo.cpp

Improve compatiblity with HPUX on Itanium, patch by Duraid Madina

2005-01-16 01:31:31 +00:00