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7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
16 lines
582 B
LLVM
16 lines
582 B
LLVM
; RUN: llc < %s -mtriple=thumbv7-apple-ios | FileCheck %s
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; rdar://11035895
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; DAG combine incorrectly optimize (i32 vextract (v4i16 load $addr), c) to
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; (i16 load $addr+c*sizeof(i16)). It should have issued an extload instead. i.e.
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; (i32 extload $addr+c*sizeof(i16)
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define void @test_hi_short3(<3 x i16> * nocapture %srcA, <2 x i16> * nocapture %dst) nounwind {
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entry:
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; CHECK: vst1.32
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%0 = load <3 x i16> , <3 x i16> * %srcA, align 8
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%1 = shufflevector <3 x i16> %0, <3 x i16> undef, <2 x i32> <i32 2, i32 undef>
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store <2 x i16> %1, <2 x i16> * %dst, align 4
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ret void
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}
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