mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-28 19:31:58 +00:00
7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
56 lines
1.5 KiB
LLVM
56 lines
1.5 KiB
LLVM
; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-darwin | FileCheck %s --check-prefix=ARM
|
|
|
|
define i32 @t1(i32* nocapture %ptr) nounwind readonly {
|
|
entry:
|
|
; ARM: t1
|
|
%add.ptr = getelementptr inbounds i32, i32* %ptr, i32 1
|
|
%0 = load i32, i32* %add.ptr, align 4
|
|
; ARM: ldr r{{[0-9]}}, [r0, #4]
|
|
ret i32 %0
|
|
}
|
|
|
|
define i32 @t2(i32* nocapture %ptr) nounwind readonly {
|
|
entry:
|
|
; ARM: t2
|
|
%add.ptr = getelementptr inbounds i32, i32* %ptr, i32 63
|
|
%0 = load i32, i32* %add.ptr, align 4
|
|
; ARM: ldr.w r{{[0-9]}}, [r0, #252]
|
|
ret i32 %0
|
|
}
|
|
|
|
define zeroext i16 @t3(i16* nocapture %ptr) nounwind readonly {
|
|
entry:
|
|
; ARM: t3
|
|
%add.ptr = getelementptr inbounds i16, i16* %ptr, i16 1
|
|
%0 = load i16, i16* %add.ptr, align 4
|
|
; ARM: ldrh r{{[0-9]}}, [r0, #2]
|
|
ret i16 %0
|
|
}
|
|
|
|
define zeroext i16 @t4(i16* nocapture %ptr) nounwind readonly {
|
|
entry:
|
|
; ARM: t4
|
|
%add.ptr = getelementptr inbounds i16, i16* %ptr, i16 63
|
|
%0 = load i16, i16* %add.ptr, align 4
|
|
; ARM: ldrh.w r{{[0-9]}}, [r0, #126]
|
|
ret i16 %0
|
|
}
|
|
|
|
define zeroext i8 @t5(i8* nocapture %ptr) nounwind readonly {
|
|
entry:
|
|
; ARM: t5
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i8 1
|
|
%0 = load i8, i8* %add.ptr, align 4
|
|
; ARM: ldrb r{{[0-9]}}, [r0, #1]
|
|
ret i8 %0
|
|
}
|
|
|
|
define zeroext i8 @t6(i8* nocapture %ptr) nounwind readonly {
|
|
entry:
|
|
; ARM: t6
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i8 63
|
|
%0 = load i8, i8* %add.ptr, align 4
|
|
; ARM: ldrb.w r{{[0-9]}}, [r0, #63]
|
|
ret i8 %0
|
|
}
|