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https://github.com/c64scene-ar/llvm-6502.git
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586c0042da
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238634 91177308-0d34-0410-b5e6-96231b3b80d8
104 lines
3.1 KiB
C++
104 lines
3.1 KiB
C++
//===-- SystemZMCInstLower.cpp - Lower MachineInstr to MCInst -------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "SystemZMCInstLower.h"
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#include "SystemZAsmPrinter.h"
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#include "llvm/IR/Mangler.h"
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#include "llvm/MC/MCExpr.h"
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#include "llvm/MC/MCInst.h"
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#include "llvm/MC/MCStreamer.h"
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using namespace llvm;
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// Return the VK_* enumeration for MachineOperand target flags Flags.
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static MCSymbolRefExpr::VariantKind getVariantKind(unsigned Flags) {
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switch (Flags & SystemZII::MO_SYMBOL_MODIFIER) {
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case 0:
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return MCSymbolRefExpr::VK_None;
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case SystemZII::MO_GOT:
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return MCSymbolRefExpr::VK_GOT;
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case SystemZII::MO_INDNTPOFF:
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return MCSymbolRefExpr::VK_INDNTPOFF;
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}
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llvm_unreachable("Unrecognised MO_ACCESS_MODEL");
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}
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SystemZMCInstLower::SystemZMCInstLower(MCContext &ctx,
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SystemZAsmPrinter &asmprinter)
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: Ctx(ctx), AsmPrinter(asmprinter) {}
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const MCExpr *
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SystemZMCInstLower::getExpr(const MachineOperand &MO,
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MCSymbolRefExpr::VariantKind Kind) const {
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const MCSymbol *Symbol;
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bool HasOffset = true;
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switch (MO.getType()) {
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case MachineOperand::MO_MachineBasicBlock:
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Symbol = MO.getMBB()->getSymbol();
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HasOffset = false;
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break;
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case MachineOperand::MO_GlobalAddress:
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Symbol = AsmPrinter.getSymbol(MO.getGlobal());
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break;
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case MachineOperand::MO_ExternalSymbol:
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Symbol = AsmPrinter.GetExternalSymbolSymbol(MO.getSymbolName());
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break;
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case MachineOperand::MO_JumpTableIndex:
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Symbol = AsmPrinter.GetJTISymbol(MO.getIndex());
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HasOffset = false;
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break;
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case MachineOperand::MO_ConstantPoolIndex:
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Symbol = AsmPrinter.GetCPISymbol(MO.getIndex());
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break;
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case MachineOperand::MO_BlockAddress:
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Symbol = AsmPrinter.GetBlockAddressSymbol(MO.getBlockAddress());
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break;
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default:
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llvm_unreachable("unknown operand type");
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}
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const MCExpr *Expr = MCSymbolRefExpr::create(Symbol, Kind, Ctx);
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if (HasOffset)
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if (int64_t Offset = MO.getOffset()) {
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const MCExpr *OffsetExpr = MCConstantExpr::create(Offset, Ctx);
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Expr = MCBinaryExpr::createAdd(Expr, OffsetExpr, Ctx);
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}
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return Expr;
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}
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MCOperand SystemZMCInstLower::lowerOperand(const MachineOperand &MO) const {
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switch (MO.getType()) {
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case MachineOperand::MO_Register:
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return MCOperand::createReg(MO.getReg());
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case MachineOperand::MO_Immediate:
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return MCOperand::createImm(MO.getImm());
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default: {
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MCSymbolRefExpr::VariantKind Kind = getVariantKind(MO.getTargetFlags());
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return MCOperand::createExpr(getExpr(MO, Kind));
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}
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}
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}
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void SystemZMCInstLower::lower(const MachineInstr *MI, MCInst &OutMI) const {
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OutMI.setOpcode(MI->getOpcode());
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for (unsigned I = 0, E = MI->getNumOperands(); I != E; ++I) {
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const MachineOperand &MO = MI->getOperand(I);
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// Ignore all implicit register operands.
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if (!MO.isReg() || !MO.isImplicit())
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OutMI.addOperand(lowerOperand(MO));
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}
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}
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