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https://github.com/c64scene-ar/llvm-6502.git
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c68ccc1a70
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241873 91177308-0d34-0410-b5e6-96231b3b80d8
213 lines
6.5 KiB
LLVM
213 lines
6.5 KiB
LLVM
; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=sse -enable-unsafe-fp-math < %s | FileCheck %s --check-prefix=SSE
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; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=avx -enable-unsafe-fp-math < %s | FileCheck %s --check-prefix=AVX
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; Verify that the first two adds are independent regardless of how the inputs are
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; commuted. The destination registers are used as source registers for the third add.
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define float @reassociate_adds1(float %x0, float %x1, float %x2, float %x3) {
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; SSE-LABEL: reassociate_adds1:
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; SSE: # BB#0:
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; SSE-NEXT: addss %xmm1, %xmm0
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; SSE-NEXT: addss %xmm3, %xmm2
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; SSE-NEXT: addss %xmm2, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: reassociate_adds1:
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; AVX: # BB#0:
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; AVX-NEXT: vaddss %xmm1, %xmm0, %xmm0
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; AVX-NEXT: vaddss %xmm3, %xmm2, %xmm1
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; AVX-NEXT: vaddss %xmm1, %xmm0, %xmm0
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; AVX-NEXT: retq
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%t0 = fadd float %x0, %x1
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%t1 = fadd float %t0, %x2
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%t2 = fadd float %t1, %x3
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ret float %t2
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}
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define float @reassociate_adds2(float %x0, float %x1, float %x2, float %x3) {
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; SSE-LABEL: reassociate_adds2:
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; SSE: # BB#0:
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; SSE-NEXT: addss %xmm1, %xmm0
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; SSE-NEXT: addss %xmm3, %xmm2
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; SSE-NEXT: addss %xmm2, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: reassociate_adds2:
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; AVX: # BB#0:
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; AVX-NEXT: vaddss %xmm1, %xmm0, %xmm0
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; AVX-NEXT: vaddss %xmm3, %xmm2, %xmm1
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; AVX-NEXT: vaddss %xmm1, %xmm0, %xmm0
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; AVX-NEXT: retq
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%t0 = fadd float %x0, %x1
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%t1 = fadd float %x2, %t0
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%t2 = fadd float %t1, %x3
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ret float %t2
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}
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define float @reassociate_adds3(float %x0, float %x1, float %x2, float %x3) {
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; SSE-LABEL: reassociate_adds3:
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; SSE: # BB#0:
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; SSE-NEXT: addss %xmm1, %xmm0
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; SSE-NEXT: addss %xmm3, %xmm2
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; SSE-NEXT: addss %xmm2, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: reassociate_adds3:
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; AVX: # BB#0:
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; AVX-NEXT: vaddss %xmm1, %xmm0, %xmm0
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; AVX-NEXT: vaddss %xmm3, %xmm2, %xmm1
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; AVX-NEXT: vaddss %xmm1, %xmm0, %xmm0
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; AVX-NEXT: retq
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%t0 = fadd float %x0, %x1
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%t1 = fadd float %t0, %x2
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%t2 = fadd float %x3, %t1
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ret float %t2
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}
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define float @reassociate_adds4(float %x0, float %x1, float %x2, float %x3) {
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; SSE-LABEL: reassociate_adds4:
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; SSE: # BB#0:
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; SSE-NEXT: addss %xmm1, %xmm0
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; SSE-NEXT: addss %xmm3, %xmm2
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; SSE-NEXT: addss %xmm2, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: reassociate_adds4:
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; AVX: # BB#0:
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; AVX-NEXT: vaddss %xmm1, %xmm0, %xmm0
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; AVX-NEXT: vaddss %xmm3, %xmm2, %xmm1
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; AVX-NEXT: vaddss %xmm1, %xmm0, %xmm0
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; AVX-NEXT: retq
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%t0 = fadd float %x0, %x1
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%t1 = fadd float %x2, %t0
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%t2 = fadd float %x3, %t1
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ret float %t2
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}
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; Verify that we reassociate some of these ops. The optimal balanced tree of adds is not
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; produced because that would cost more compile time.
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define float @reassociate_adds5(float %x0, float %x1, float %x2, float %x3, float %x4, float %x5, float %x6, float %x7) {
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; SSE-LABEL: reassociate_adds5:
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; SSE: # BB#0:
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; SSE-NEXT: addss %xmm1, %xmm0
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; SSE-NEXT: addss %xmm3, %xmm2
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; SSE-NEXT: addss %xmm2, %xmm0
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; SSE-NEXT: addss %xmm5, %xmm4
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; SSE-NEXT: addss %xmm6, %xmm4
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; SSE-NEXT: addss %xmm4, %xmm0
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; SSE-NEXT: addss %xmm7, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: reassociate_adds5:
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; AVX: # BB#0:
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; AVX-NEXT: vaddss %xmm1, %xmm0, %xmm0
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; AVX-NEXT: vaddss %xmm3, %xmm2, %xmm1
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; AVX-NEXT: vaddss %xmm1, %xmm0, %xmm0
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; AVX-NEXT: vaddss %xmm5, %xmm4, %xmm1
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; AVX-NEXT: vaddss %xmm6, %xmm1, %xmm1
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; AVX-NEXT: vaddss %xmm1, %xmm0, %xmm0
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; AVX-NEXT: vaddss %xmm7, %xmm0, %xmm0
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; AVX-NEXT: retq
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%t0 = fadd float %x0, %x1
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%t1 = fadd float %t0, %x2
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%t2 = fadd float %t1, %x3
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%t3 = fadd float %t2, %x4
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%t4 = fadd float %t3, %x5
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%t5 = fadd float %t4, %x6
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%t6 = fadd float %t5, %x7
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ret float %t6
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}
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; Verify that we only need two associative operations to reassociate the operands.
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; Also, we should reassociate such that the result of the high latency division
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; is used by the final 'add' rather than reassociating the %x3 operand with the
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; division. The latter reassociation would not improve anything.
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define float @reassociate_adds6(float %x0, float %x1, float %x2, float %x3) {
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; SSE-LABEL: reassociate_adds6:
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; SSE: # BB#0:
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; SSE-NEXT: divss %xmm1, %xmm0
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; SSE-NEXT: addss %xmm3, %xmm2
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; SSE-NEXT: addss %xmm2, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: reassociate_adds6:
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; AVX: # BB#0:
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; AVX-NEXT: vdivss %xmm1, %xmm0, %xmm0
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; AVX-NEXT: vaddss %xmm3, %xmm2, %xmm1
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; AVX-NEXT: vaddss %xmm1, %xmm0, %xmm0
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; AVX-NEXT: retq
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%t0 = fdiv float %x0, %x1
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%t1 = fadd float %x2, %t0
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%t2 = fadd float %x3, %t1
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ret float %t2
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}
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; Verify that SSE and AVX scalar single-precison multiplies are reassociated.
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define float @reassociate_muls1(float %x0, float %x1, float %x2, float %x3) {
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; SSE-LABEL: reassociate_muls1:
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; SSE: # BB#0:
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; SSE-NEXT: divss %xmm1, %xmm0
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; SSE-NEXT: mulss %xmm3, %xmm2
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; SSE-NEXT: mulss %xmm2, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: reassociate_muls1:
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; AVX: # BB#0:
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; AVX-NEXT: vdivss %xmm1, %xmm0, %xmm0
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; AVX-NEXT: vmulss %xmm3, %xmm2, %xmm1
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; AVX-NEXT: vmulss %xmm1, %xmm0, %xmm0
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; AVX-NEXT: retq
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%t0 = fdiv float %x0, %x1
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%t1 = fmul float %x2, %t0
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%t2 = fmul float %x3, %t1
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ret float %t2
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}
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; Verify that SSE and AVX scalar double-precison adds are reassociated.
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define double @reassociate_adds_double(double %x0, double %x1, double %x2, double %x3) {
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; SSE-LABEL: reassociate_adds_double:
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; SSE: # BB#0:
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; SSE-NEXT: divsd %xmm1, %xmm0
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; SSE-NEXT: addsd %xmm3, %xmm2
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; SSE-NEXT: addsd %xmm2, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: reassociate_adds_double:
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; AVX: # BB#0:
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; AVX-NEXT: vdivsd %xmm1, %xmm0, %xmm0
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; AVX-NEXT: vaddsd %xmm3, %xmm2, %xmm1
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; AVX-NEXT: vaddsd %xmm1, %xmm0, %xmm0
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; AVX-NEXT: retq
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%t0 = fdiv double %x0, %x1
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%t1 = fadd double %x2, %t0
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%t2 = fadd double %x3, %t1
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ret double %t2
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}
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; Verify that SSE and AVX scalar double-precison multiplies are reassociated.
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define double @reassociate_muls_double(double %x0, double %x1, double %x2, double %x3) {
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; SSE-LABEL: reassociate_muls_double:
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; SSE: # BB#0:
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; SSE-NEXT: divsd %xmm1, %xmm0
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; SSE-NEXT: mulsd %xmm3, %xmm2
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; SSE-NEXT: mulsd %xmm2, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: reassociate_muls_double:
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; AVX: # BB#0:
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; AVX-NEXT: vdivsd %xmm1, %xmm0, %xmm0
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; AVX-NEXT: vmulsd %xmm3, %xmm2, %xmm1
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; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm0
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; AVX-NEXT: retq
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%t0 = fdiv double %x0, %x1
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%t1 = fmul double %x2, %t0
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%t2 = fmul double %x3, %t1
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ret double %t2
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}
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