llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-02-04 07:32:13 +00:00

History

Michael Liao dc8c044a9a Fix PR16807

- Lower signed division by constant powers-of-2 to target-independent
  DAG operators instead of target-dependent ones to support them better
  on targets where vector types are legal but shift operators on that
  types are illegal. E.g., on AVX, PSRAW is only available on <8 x i16>
  though <16 x i16> is a legal type.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192721 91177308-0d34-0410-b5e6-96231b3b80d8

2013-10-15 17:51:02 +00:00

Analysis

Remove x86_sse42_crc32_64_8 intrinsic. It has no functional difference from x86_sse42_crc32_32_8 and was not mapped to a clang builtin. I'm not even sure why this form of the instruction is even called out explicitly in the docs. Also add AutoUpgrade support to convert it into the other intrinsic with appropriate trunc and zext.

2013-10-15 05:20:47 +00:00

AsmParser

…

Bitcode

Update comment list of GLOBALVAR modifiers in BitcodeWriter to include externally_initialized.

2013-10-14 22:36:51 +00:00

CodeGen

Guard the debug temp variable with NDEBUG to avoid warning/error with NDEBUG defined.

2013-10-15 14:40:46 +00:00