mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-10-30 16:17:05 +00:00
8b2b8a1835
This update was done with the following bash script:
find test/CodeGen -name "*.ll" | \
while read NAME; do
echo "$NAME"
if ! grep -q "^; *RUN: *llc.*debug" $NAME; then
TEMP=`mktemp -t temp`
cp $NAME $TEMP
sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \
while read FUNC; do
sed -i '' "s/;\(.*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC: *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP
done
sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP
sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP
sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP
sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP
mv $TEMP $NAME
fi
done
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186280 91177308-0d34-0410-b5e6-96231b3b80d8
111 lines
3.2 KiB
LLVM
111 lines
3.2 KiB
LLVM
; RUN: llc < %s -march=x86 -mcpu=core2 | FileCheck %s
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define i32 @t1() nounwind {
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entry:
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%0 = tail call i32 asm sideeffect inteldialect "mov eax, $1\0A\09mov $0, eax", "=r,r,~{eax},~{dirflag},~{fpsr},~{flags}"(i32 1) nounwind
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ret i32 %0
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; CHECK: t1
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; CHECK: movl %esp, %ebp
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; CHECK: {{## InlineAsm Start|#APP}}
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; CHECK: .intel_syntax
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; CHECK: mov eax, ecx
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; CHECK: mov ecx, eax
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; CHECK: .att_syntax
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; CHECK: {{## InlineAsm End|#NO_APP}}
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}
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define void @t2() nounwind {
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entry:
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call void asm sideeffect inteldialect "mov eax, $$1", "~{eax},~{dirflag},~{fpsr},~{flags}"() nounwind
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ret void
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; CHECK: t2
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; CHECK: movl %esp, %ebp
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; CHECK: {{## InlineAsm Start|#APP}}
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; CHECK: .intel_syntax
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; CHECK: mov eax, 1
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; CHECK: .att_syntax
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; CHECK: {{## InlineAsm End|#NO_APP}}
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}
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define void @t3(i32 %V) nounwind {
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entry:
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%V.addr = alloca i32, align 4
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store i32 %V, i32* %V.addr, align 4
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call void asm sideeffect inteldialect "mov eax, DWORD PTR [$0]", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %V.addr) nounwind
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ret void
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; CHECK: t3
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; CHECK: movl %esp, %ebp
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; CHECK: {{## InlineAsm Start|#APP}}
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; CHECK: .intel_syntax
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; CHECK: mov eax, DWORD PTR {{[[esp]}}
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; CHECK: .att_syntax
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; CHECK: {{## InlineAsm End|#NO_APP}}
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}
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%struct.t18_type = type { i32, i32 }
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define i32 @t18() nounwind {
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entry:
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%foo = alloca %struct.t18_type, align 4
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%a = getelementptr inbounds %struct.t18_type* %foo, i32 0, i32 0
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store i32 1, i32* %a, align 4
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%b = getelementptr inbounds %struct.t18_type* %foo, i32 0, i32 1
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store i32 2, i32* %b, align 4
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call void asm sideeffect inteldialect "lea ebx, foo\0A\09mov eax, [ebx].0\0A\09mov [ebx].4, ecx", "~{eax},~{dirflag},~{fpsr},~{flags}"() nounwind
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%b1 = getelementptr inbounds %struct.t18_type* %foo, i32 0, i32 1
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%0 = load i32* %b1, align 4
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ret i32 %0
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; CHECK: t18
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; CHECK: movl %esp, %ebp
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; CHECK: {{## InlineAsm Start|#APP}}
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; CHECK: .intel_syntax
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; CHECK: lea ebx, foo
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; CHECK: mov eax, [ebx].0
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; CHECK: mov [ebx].4, ecx
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; CHECK: .att_syntax
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; CHECK: {{## InlineAsm End|#NO_APP}}
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}
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define void @t19_helper() nounwind {
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entry:
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ret void
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}
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define void @t19() nounwind {
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entry:
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call void asm sideeffect inteldialect "call $0", "r,~{dirflag},~{fpsr},~{flags}"(void ()* @t19_helper) nounwind
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ret void
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; CHECK-LABEL: t19:
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; CHECK: movl %esp, %ebp
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; CHECK: movl ${{_?}}t19_helper, %eax
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; CHECK: {{## InlineAsm Start|#APP}}
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; CHECK: .intel_syntax
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; CHECK: call eax
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; CHECK: .att_syntax
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; CHECK: {{## InlineAsm End|#NO_APP}}
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}
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@results = global [2 x i32] [i32 3, i32 2], align 4
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define i32* @t30() nounwind ssp {
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entry:
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%res = alloca i32*, align 4
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call void asm sideeffect inteldialect "lea edi, dword ptr $0", "*m,~{edi},~{dirflag},~{fpsr},~{flags}"([2 x i32]* @results) nounwind
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call void asm sideeffect inteldialect "mov dword ptr $0, edi", "=*m,~{dirflag},~{fpsr},~{flags}"(i32** %res) nounwind
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%0 = load i32** %res, align 4
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ret i32* %0
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; CHECK-LABEL: t30:
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; CHECK: movl %esp, %ebp
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; CHECK: {{## InlineAsm Start|#APP}}
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; CHECK: .intel_syntax
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; CHECK: lea edi, dword ptr [{{_?}}results]
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; CHECK: .att_syntax
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; CHECK: {{## InlineAsm End|#NO_APP}}
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; CHECK: {{## InlineAsm Start|#APP}}
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; CHECK: .intel_syntax
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; CHECK: mov dword ptr [esi], edi
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; CHECK: .att_syntax
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; CHECK: {{## InlineAsm End|#NO_APP}}
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; CHECK: movl (%esi), %eax
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}
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