Misha Brukman dcbe712841 Removed useless code -- the byte order of output code is correct as is. ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6462 91177308-0d34-0410-b5e6-96231b3b80d8

2003-05-31 06:26:06 +00:00

..

InstrSched

(1) Added special register class containing (for now) %fsr.

2003-05-27 00:05:23 +00:00

InstrSelection

When converting virtual registers to immediate constants, change the opcode.

2003-05-30 20:36:27 +00:00

LiveVar

Renamed MachienOperand::opIsDef to MachineOperand::opIsDefOnly()

2003-05-27 00:06:48 +00:00

ModuloScheduling

so far everything compiles

2003-05-30 00:17:09 +00:00

RegAlloc

(1) Added special register class containing (for now) %fsr.

2003-05-27 00:05:23 +00:00

.cvsignore

Since there is now another derived .inc file, ignore them all.

2003-05-29 20:15:27 +00:00

EmitBytecodeToAssembly.cpp

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MachineCodeForInstruction.h

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MachineFunctionInfo.h

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MachineInstrAnnot.h

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Makefile

Makefile: Make SparcV9CodeEmitter.inc depend on SparcV9_F*.td as well.

2003-05-30 08:02:14 +00:00

MappingInfo.cpp

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MappingInfo.h

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SparcV9_F2.td

* Broke up SparcV9.td into separate files as it was getting unmanageable

2003-05-29 03:31:43 +00:00

SparcV9_F3.td

The 'rd' register is consistently mentioned last in instruction definitions.

2003-05-31 06:25:19 +00:00

SparcV9_F4.td

* Broke up SparcV9.td into separate files as it was getting unmanageable

2003-05-29 03:31:43 +00:00

SparcV9_Reg.td

* Broke up SparcV9.td into separate files as it was getting unmanageable

2003-05-29 03:31:43 +00:00

SparcV9.burg.in

Add support for compiling varargs functions.

2003-05-25 15:59:47 +00:00

SparcV9.td

* Put back into action SLL/SRL/SRA{r,i}6 instructions

2003-05-31 06:24:29 +00:00

SparcV9AsmPrinter.cpp

Code beautification, no functional changes.

2003-05-31 06:22:37 +00:00

SparcV9CodeEmitter.cpp

Removed useless code -- the byte order of output code is correct as is.

2003-05-31 06:26:06 +00:00

SparcV9CodeEmitter.h

Added:

2003-05-30 20:17:33 +00:00

SparcV9Instr.def

Made the register and immediate versions of instructions consecutive.

2003-05-30 19:14:01 +00:00

SparcV9InstrInfo.cpp

Added 'r' or 'i' annotations to instructions, as SparcInstr.def has changed.

2003-05-27 22:35:43 +00:00

SparcV9InstrSelection.cpp

Code beautification, no functional changes.

2003-05-31 06:22:37 +00:00

SparcV9InstrSelectionSupport.h

Moved and expanded convertOpcodeFromRegToImm() to conver more opcodes.

2003-05-30 20:11:56 +00:00

SparcV9Internals.h

The register types need to be visible outside of the class to be useful.

2003-05-30 20:12:42 +00:00

SparcV9PeepholeOpts.cpp

Cleaned up code layout; no functional changes.

2003-05-23 19:20:57 +00:00

SparcV9PreSelection.cpp

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SparcV9PrologEpilogInserter.cpp

Added 'r' or 'i' annotations to instructions, as SparcInstr.def has changed.

2003-05-27 22:35:43 +00:00

SparcV9RegClassInfo.cpp

Fixed `volatile' typo.

2003-05-21 19:34:28 +00:00

SparcV9RegClassInfo.h

Added special register class containing (for now) %fsr.

2003-05-27 00:02:22 +00:00

SparcV9RegInfo.cpp

Added 'r' and 'i' annotations to instructions as SparcInstr.def has changed.

2003-05-27 22:40:34 +00:00

SparcV9SchedInfo.cpp

Added entries for each of the instructions with annotations ('r' or 'i').

2003-05-27 22:33:39 +00:00

SparcV9StackSlots.cpp

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SparcV9TargetMachine.cpp

Enabling some of these passes causes lli to break

2003-05-31 04:23:04 +00:00