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https://github.com/c64scene-ar/llvm-6502.git
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b1138a1313
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206198 91177308-0d34-0410-b5e6-96231b3b80d8
101 lines
3.4 KiB
C++
101 lines
3.4 KiB
C++
//=====---- ARM64Subtarget.h - Define Subtarget for the ARM64 -*- C++ -*--====//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares the ARM64 specific subclass of TargetSubtarget.
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//
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//===----------------------------------------------------------------------===//
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#ifndef ARM64SUBTARGET_H
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#define ARM64SUBTARGET_H
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#include "llvm/Target/TargetSubtargetInfo.h"
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#include "ARM64RegisterInfo.h"
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#include <string>
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#define GET_SUBTARGETINFO_HEADER
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#include "ARM64GenSubtargetInfo.inc"
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namespace llvm {
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class GlobalValue;
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class StringRef;
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class ARM64Subtarget : public ARM64GenSubtargetInfo {
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protected:
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enum ARMProcFamilyEnum {Others, CortexA53, CortexA57, Cyclone};
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/// ARMProcFamily - ARM processor family: Cortex-A53, Cortex-A57, and others.
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ARMProcFamilyEnum ARMProcFamily;
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bool HasFPARMv8;
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bool HasNEON;
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bool HasCrypto;
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// HasZeroCycleRegMove - Has zero-cycle register mov instructions.
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bool HasZeroCycleRegMove;
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// HasZeroCycleZeroing - Has zero-cycle zeroing instructions.
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bool HasZeroCycleZeroing;
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/// CPUString - String name of used CPU.
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std::string CPUString;
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/// TargetTriple - What processor and OS we're targeting.
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Triple TargetTriple;
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public:
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/// This constructor initializes the data members to match that
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/// of the specified triple.
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ARM64Subtarget(const std::string &TT, const std::string &CPU,
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const std::string &FS);
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bool enableMachineScheduler() const override { return true; }
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bool hasZeroCycleRegMove() const { return HasZeroCycleRegMove; }
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bool hasZeroCycleZeroing() const { return HasZeroCycleZeroing; }
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bool hasFPARMv8() const { return HasFPARMv8; }
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bool hasNEON() const { return HasNEON; }
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bool hasCrypto() const { return HasCrypto; }
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bool isTargetDarwin() const { return TargetTriple.isOSDarwin(); }
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bool isTargetELF() const { return TargetTriple.isOSBinFormatELF(); }
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bool isTargetMachO() const { return TargetTriple.isOSBinFormatMachO(); }
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bool isCyclone() const { return CPUString == "cyclone"; }
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/// getMaxInlineSizeThreshold - Returns the maximum memset / memcpy size
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/// that still makes it profitable to inline the call.
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unsigned getMaxInlineSizeThreshold() const { return 64; }
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/// ParseSubtargetFeatures - Parses features string setting specified
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/// subtarget options. Definition of function is auto generated by tblgen.
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void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
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/// ClassifyGlobalReference - Find the target operand flags that describe
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/// how a global value should be referenced for the current subtarget.
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unsigned char ClassifyGlobalReference(const GlobalValue *GV,
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const TargetMachine &TM) const;
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/// This function returns the name of a function which has an interface
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/// like the non-standard bzero function, if such a function exists on
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/// the current subtarget and it is considered prefereable over
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/// memset with zero passed as the second argument. Otherwise it
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/// returns null.
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const char *getBZeroEntry() const;
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void overrideSchedPolicy(MachineSchedPolicy &Policy, MachineInstr *begin,
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MachineInstr *end, unsigned NumRegionInstrs) const;
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};
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} // End llvm namespace
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#endif // ARM64SUBTARGET_H
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