mirror of
				https://github.com/c64scene-ar/llvm-6502.git
				synced 2025-10-31 08:16:47 +00:00 
			
		
		
		
	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134298 91177308-0d34-0410-b5e6-96231b3b80d8
		
			
				
	
	
		
			66 lines
		
	
	
		
			2.2 KiB
		
	
	
	
		
			C++
		
	
	
	
	
	
			
		
		
	
	
			66 lines
		
	
	
		
			2.2 KiB
		
	
	
	
		
			C++
		
	
	
	
	
	
| //==-- llvm/MC/MCSubtargetInfo.h - Subtarget Information ---------*- C++ -*-==//
 | |
| //
 | |
| //                     The LLVM Compiler Infrastructure
 | |
| //
 | |
| // This file is distributed under the University of Illinois Open Source
 | |
| // License. See LICENSE.TXT for details.
 | |
| //
 | |
| //===----------------------------------------------------------------------===//
 | |
| //
 | |
| // This file describes the subtarget options of a Target machine.
 | |
| //
 | |
| //===----------------------------------------------------------------------===//
 | |
| 
 | |
| #ifndef LLVM_MC_MCSUBTARGET_H
 | |
| #define LLVM_MC_MCSUBTARGET_H
 | |
| 
 | |
| #include "llvm/MC/SubtargetFeature.h"
 | |
| #include "llvm/MC/MCInstrItineraries.h"
 | |
| 
 | |
| namespace llvm {
 | |
| 
 | |
| class StringRef;
 | |
| 
 | |
| //===----------------------------------------------------------------------===//
 | |
| ///
 | |
| /// MCSubtargetInfo - Generic base class for all target subtargets.
 | |
| ///
 | |
| class MCSubtargetInfo {
 | |
|   const SubtargetFeatureKV *ProcFeatures;  // Processor feature list
 | |
|   const SubtargetFeatureKV *ProcDesc;  // Processor descriptions
 | |
|   const SubtargetInfoKV *ProcItins;    // Scheduling itineraries
 | |
|   const InstrStage *Stages;            // Instruction stages
 | |
|   const unsigned *OperandCycles;       // Operand cycles
 | |
|   const unsigned *ForwardingPathes;    // Forwarding pathes
 | |
|   unsigned NumFeatures;                // Number of processor features
 | |
|   unsigned NumProcs;                   // Number of processors
 | |
|     
 | |
| public:
 | |
|   void InitMCSubtargetInfo(const SubtargetFeatureKV *PF,
 | |
|                            const SubtargetFeatureKV *PD,
 | |
|                            const SubtargetInfoKV *PI, const InstrStage *IS,
 | |
|                            const unsigned *OC, const unsigned *FP,
 | |
|                            unsigned NF, unsigned NP) {
 | |
|     ProcFeatures = PF;
 | |
|     ProcDesc = PD;
 | |
|     ProcItins = PI;
 | |
|     Stages = IS;
 | |
|     OperandCycles = OC;
 | |
|     ForwardingPathes = FP;
 | |
|     NumFeatures = NF;
 | |
|     NumProcs = NP;
 | |
|   }
 | |
| 
 | |
|   /// getInstrItineraryForCPU - Get scheduling itinerary of a CPU.
 | |
|   ///
 | |
|   InstrItineraryData getInstrItineraryForCPU(StringRef CPU) const;
 | |
| 
 | |
|   /// getFeatureBits - Get the feature bits for a CPU (optionally supplemented
 | |
|   /// with feature string).
 | |
|   uint64_t getFeatureBits(StringRef CPU, StringRef FS) const;
 | |
| };
 | |
| 
 | |
| } // End llvm namespace
 | |
| 
 | |
| #endif
 |