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12f33da20b
On AArch64 the pseudo instruction ldr <reg>, =... supports both 32-bit and 64-bit constants. Add support for 64 bit constants for the pools to support the pseudo instruction fully. Changes the AArch64 ldr-pseudo tests to use 32-bit registers and adds tests with 64-bit registers. Patch by Janne Grunau! Differential Revision: http://reviews.llvm.org/D4279 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213387 91177308-0d34-0410-b5e6-96231b3b80d8
42 lines
1.4 KiB
C++
42 lines
1.4 KiB
C++
//===- AArch64TargetStreamer.cpp - AArch64TargetStreamer class --*- C++ -*---------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the AArch64TargetStreamer class.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/ADT/MapVector.h"
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#include "llvm/MC/ConstantPools.h"
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#include "llvm/MC/MCContext.h"
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#include "llvm/MC/MCExpr.h"
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#include "llvm/MC/MCStreamer.h"
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using namespace llvm;
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//
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// AArch64TargetStreamer Implemenation
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//
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AArch64TargetStreamer::AArch64TargetStreamer(MCStreamer &S)
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: MCTargetStreamer(S), ConstantPools(new AssemblerConstantPools()) {}
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AArch64TargetStreamer::~AArch64TargetStreamer() {}
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// The constant pool handling is shared by all AArch64TargetStreamer
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// implementations.
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const MCExpr *AArch64TargetStreamer::addConstantPoolEntry(const MCExpr *Expr,
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unsigned Size) {
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return ConstantPools->addEntry(Streamer, Expr, Size);
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}
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void AArch64TargetStreamer::emitCurrentConstantPool() {
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ConstantPools->emitForCurrentSection(Streamer);
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}
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// finish() - write out any non-empty assembler constant pools.
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void AArch64TargetStreamer::finish() { ConstantPools->emitAll(Streamer); }
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