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30be10a06e
The 0x66 prefix toggles between 16-bit and 32-bit addressing mode. So in 32-bit mode it is used to switch to 16-bit addressing mode for the following instruction, while in 16-bit mode it's the other way round — it's used to switch to 32-bit mode instead. Thus, emit the 0x66 prefix byte for OpSize only in 32-bit (and 64-bit) mode, and introduce a new OpSize16 bit which is used in 16-bit mode instead. This is just the basic infrastructure for that change; a subsequent patch will add the new OpSize16 bit to the 32-bit instructions that need it. Patch from David Woodhouse. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198586 91177308-0d34-0410-b5e6-96231b3b80d8 |
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.. | ||
AlignedBundling | ||
3DNow.s | ||
2011-09-06-NoNewline.s | ||
address-size.s | ||
avx512-encodings.s | ||
cfi_def_cfa-crash.s | ||
fde-reloc.s | ||
gnux32-dwarf-gen.s | ||
intel-syntax-2.s | ||
intel-syntax-directional-label.s | ||
intel-syntax-encoding.s | ||
intel-syntax-hex.s | ||
intel-syntax.s | ||
lit.local.cfg | ||
padlock.s | ||
shuffle-comments.s | ||
stackmap-nops.ll | ||
x86_64-avx-clmul-encoding.s | ||
x86_64-avx-encoding.s | ||
x86_64-bmi-encoding.s | ||
x86_64-encoding.s | ||
x86_64-fma3-encoding.s | ||
x86_64-fma4-encoding.s | ||
x86_64-hle-encoding.s | ||
x86_64-imm-widths.s | ||
x86_64-rand-encoding.s | ||
x86_64-rtm-encoding.s | ||
x86_64-sse4a.s | ||
x86_64-tbm-encoding.s | ||
x86_64-xop-encoding.s | ||
x86_directives.s | ||
x86_errors.s | ||
x86_long_nop.s | ||
x86_nop.s | ||
x86_operands.s | ||
x86-16.s | ||
x86-32-avx.s | ||
x86-32-coverage.s | ||
x86-32-fma3.s | ||
x86-32-ms-inline-asm.s | ||
x86-32.s | ||
x86-64.s |