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https://github.com/c64scene-ar/llvm-6502.git
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878c6281d3
The architecture doesn't really have any native v4f32 operations except v4f32->v2f64 and v2f64->v4f32 conversions, with only half of the v4f32 elements being used. Even so, using vector registers for <4 x float> and scalarising individual operations is much better than generating completely scalar code, since there's much less register pressure. It's also more efficient to do v4f32 comparisons by extending to 2 v2f64s, comparing those, then packing the result. This particularly helps with llvmpipe. Based on a patch by Richard Sandiford. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236523 91177308-0d34-0410-b5e6-96231b3b80d8
97 lines
2.5 KiB
LLVM
97 lines
2.5 KiB
LLVM
; Test insertions of memory values into 0.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
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; Test VLLEZB.
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define <16 x i8> @f1(i8 *%ptr) {
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; CHECK-LABEL: f1:
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; CHECK: vllezb %v24, 0(%r2)
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; CHECK: br %r14
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%val = load i8, i8 *%ptr
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%ret = insertelement <16 x i8> zeroinitializer, i8 %val, i32 7
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ret <16 x i8> %ret
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}
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; Test VLLEZB with the highest in-range offset.
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define <16 x i8> @f2(i8 *%base) {
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; CHECK-LABEL: f2:
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; CHECK: vllezb %v24, 4095(%r2)
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; CHECK: br %r14
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%ptr = getelementptr i8, i8 *%base, i64 4095
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%val = load i8, i8 *%ptr
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%ret = insertelement <16 x i8> zeroinitializer, i8 %val, i32 7
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ret <16 x i8> %ret
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}
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; Test VLLEZB with the next highest offset.
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define <16 x i8> @f3(i8 *%base) {
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; CHECK-LABEL: f3:
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; CHECK-NOT: vllezb %v24, 4096(%r2)
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; CHECK: br %r14
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%ptr = getelementptr i8, i8 *%base, i64 4096
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%val = load i8, i8 *%ptr
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%ret = insertelement <16 x i8> zeroinitializer, i8 %val, i32 7
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ret <16 x i8> %ret
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}
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; Test that VLLEZB allows an index.
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define <16 x i8> @f4(i8 *%base, i64 %index) {
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; CHECK-LABEL: f4:
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; CHECK: vllezb %v24, 0({{%r2,%r3|%r3,%r2}})
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; CHECK: br %r14
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%ptr = getelementptr i8, i8 *%base, i64 %index
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%val = load i8, i8 *%ptr
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%ret = insertelement <16 x i8> zeroinitializer, i8 %val, i32 7
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ret <16 x i8> %ret
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}
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; Test VLLEZH.
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define <8 x i16> @f5(i16 *%ptr) {
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; CHECK-LABEL: f5:
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; CHECK: vllezh %v24, 0(%r2)
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; CHECK: br %r14
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%val = load i16, i16 *%ptr
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%ret = insertelement <8 x i16> zeroinitializer, i16 %val, i32 3
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ret <8 x i16> %ret
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}
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; Test VLLEZF.
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define <4 x i32> @f6(i32 *%ptr) {
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; CHECK-LABEL: f6:
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; CHECK: vllezf %v24, 0(%r2)
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; CHECK: br %r14
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%val = load i32, i32 *%ptr
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%ret = insertelement <4 x i32> zeroinitializer, i32 %val, i32 1
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ret <4 x i32> %ret
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}
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; Test VLLEZG.
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define <2 x i64> @f7(i64 *%ptr) {
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; CHECK-LABEL: f7:
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; CHECK: vllezg %v24, 0(%r2)
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; CHECK: br %r14
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%val = load i64, i64 *%ptr
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%ret = insertelement <2 x i64> zeroinitializer, i64 %val, i32 0
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ret <2 x i64> %ret
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}
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; Test VLLEZF with a float.
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define <4 x float> @f8(float *%ptr) {
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; CHECK-LABEL: f8:
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; CHECK: vllezf %v24, 0(%r2)
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; CHECK: br %r14
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%val = load float, float *%ptr
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%ret = insertelement <4 x float> zeroinitializer, float %val, i32 1
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ret <4 x float> %ret
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}
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; Test VLLEZG with a double.
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define <2 x double> @f9(double *%ptr) {
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; CHECK-LABEL: f9:
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; CHECK: vllezg %v24, 0(%r2)
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; CHECK: br %r14
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%val = load double, double *%ptr
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%ret = insertelement <2 x double> zeroinitializer, double %val, i32 0
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ret <2 x double> %ret
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}
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