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b89be6150a
TableGen has been taught to generate the lists from instruction definitions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57722 91177308-0d34-0410-b5e6-96231b3b80d8
69 lines
2.1 KiB
C++
69 lines
2.1 KiB
C++
//===- InstrInfoEmitter.h - Generate a Instruction Set Desc. ----*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This tablegen backend is responsible for emitting a description of the target
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// instruction set for the code generator.
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//
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//===----------------------------------------------------------------------===//
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#ifndef INSTRINFO_EMITTER_H
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#define INSTRINFO_EMITTER_H
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#include "TableGenBackend.h"
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#include "CodeGenDAGPatterns.h"
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#include <vector>
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#include <map>
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namespace llvm {
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class StringInit;
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class IntInit;
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class ListInit;
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class CodeGenInstruction;
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class InstrInfoEmitter : public TableGenBackend {
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RecordKeeper &Records;
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CodeGenDAGPatterns CDP;
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std::map<std::string, unsigned> ItinClassMap;
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public:
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InstrInfoEmitter(RecordKeeper &R) : Records(R), CDP(R) { }
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// run - Output the instruction set description, returning true on failure.
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void run(std::ostream &OS);
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private:
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typedef std::map<std::vector<std::string>, unsigned> OperandInfoMapTy;
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void emitRecord(const CodeGenInstruction &Inst, unsigned Num,
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Record *InstrInfo,
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std::map<std::vector<Record*>, unsigned> &EL,
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std::map<Record*, unsigned> &BM,
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const OperandInfoMapTy &OpInfo,
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std::ostream &OS);
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void emitShiftedValue(Record *R, StringInit *Val, IntInit *Shift,
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std::ostream &OS);
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// Itinerary information.
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void GatherItinClasses();
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unsigned getItinClassNumber(const Record *InstRec);
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// Operand information.
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void EmitOperandInfo(std::ostream &OS, OperandInfoMapTy &OperandInfoIDs);
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std::vector<std::string> GetOperandInfo(const CodeGenInstruction &Inst);
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void DetectRegisterClassBarriers(std::vector<Record*> &Defs,
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const std::vector<CodeGenRegisterClass> &RCs,
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std::vector<Record*> &Barriers);
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};
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} // End llvm namespace
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#endif
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