llvm-6502/test/MC
Hao Liu e04ed6b8b1 Fixed a bug about disassembling AArch64 post-index load/store single element instructions.
ie. echo "0x00 0x04 0x80 0x0d" | ../bin/llvm-mc -triple=aarch64 -mattr=+neon -disassemble
    echo "0x00 0x00 0x80 0x0d" | ../bin/llvm-mc -triple=aarch64 -mattr=+neon -disassemble
will be disassembled into the same instruction st1 {v0b}[0], [x0], x0.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195591 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-25 01:53:26 +00:00
..
AArch64 Implemented Neon scalar vdup_lane intrinsics. 2013-11-21 08:16:15 +00:00
ARM ARM: diagnose invalid system LDM/STM 2013-11-12 21:32:41 +00:00
AsmParser
COFF Support multiple COFF sections with the same name but different COMDAT. 2013-11-19 19:52:52 +00:00
Disassembler Fixed a bug about disassembling AArch64 post-index load/store single element instructions. 2013-11-25 01:53:26 +00:00
ELF This commit adds some (but not all) of the x86-64 relocations that are not 2013-10-30 18:47:25 +00:00
MachO
Markup
Mips reverts 195057 per request 2013-11-19 20:53:28 +00:00
PowerPC
SystemZ [SystemZ] Add the general form of BCR 2013-11-13 16:57:53 +00:00
X86 X86: Assembly files with .cfi_cfa_def shouldn't hit llvm_unreachable() 2013-11-08 22:33:06 +00:00