llvm-6502/test/MC/Disassembler/PowerPC
Hal Finkel 1427abbf6b Add a disassembler to the PowerPC backend
The tests for the disassembler were adapted from the encoder tests, and for the
most part, the output from the disassembler matches that encoder-test inputs.
There are some places where more-informative mnemonics could be produced
(notably for the branch instructions), and those cases are noted in the tests
with FIXMEs.

Future work includes:

 - Generating more-informative mnemonics when possible (this may also be done
   in the printer).

 - Remove the dependence on positional "numbered" operand-to-variable mapping
   (for both encoding and decoding).

 - Internally using 64-bit instruction variants in 64-bit mode (if this turns
   out to matter).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197693 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-19 16:13:01 +00:00
..
lit.local.cfg
ppc64-encoding-bookII.txt
ppc64-encoding-bookIII.txt
ppc64-encoding-ext.txt
ppc64-encoding-fp.txt
ppc64-encoding-vmx.txt
ppc64-encoding.txt
ppc64-operands.txt