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65f303fd0c
v8.1a is renamed to architecture, accordingly to approaches in ARM backend. Excess generic cpu is removed. Intended use: "generic" cpu with "v8.1a" subtarget feature Reviewers: jmolloy Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D8766 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233810 91177308-0d34-0410-b5e6-96231b3b80d8
133 lines
4.9 KiB
C++
133 lines
4.9 KiB
C++
//===-- AArch64Subtarget.cpp - AArch64 Subtarget Information ----*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the AArch64 specific subclass of TargetSubtarget.
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//
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//===----------------------------------------------------------------------===//
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#include "AArch64InstrInfo.h"
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#include "AArch64PBQPRegAlloc.h"
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#include "AArch64Subtarget.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/CodeGen/MachineScheduler.h"
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#include "llvm/IR/GlobalValue.h"
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#include "llvm/Support/TargetRegistry.h"
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using namespace llvm;
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#define DEBUG_TYPE "aarch64-subtarget"
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#define GET_SUBTARGETINFO_CTOR
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#define GET_SUBTARGETINFO_TARGET_DESC
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#include "AArch64GenSubtargetInfo.inc"
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static cl::opt<bool>
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EnableEarlyIfConvert("aarch64-early-ifcvt", cl::desc("Enable the early if "
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"converter pass"), cl::init(true), cl::Hidden);
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AArch64Subtarget &
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AArch64Subtarget::initializeSubtargetDependencies(StringRef FS) {
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// Determine default and user-specified characteristics
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if (CPUString.empty())
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CPUString = "generic";
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ParseSubtargetFeatures(CPUString, FS);
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return *this;
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}
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AArch64Subtarget::AArch64Subtarget(const std::string &TT,
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const std::string &CPU,
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const std::string &FS,
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const TargetMachine &TM, bool LittleEndian)
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: AArch64GenSubtargetInfo(TT, CPU, FS), ARMProcFamily(Others),
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HasV8_1aOps(false),
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HasFPARMv8(false), HasNEON(false), HasCrypto(false), HasCRC(false),
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HasZeroCycleRegMove(false), HasZeroCycleZeroing(false),
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IsLittle(LittleEndian), CPUString(CPU), TargetTriple(TT), FrameLowering(),
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InstrInfo(initializeSubtargetDependencies(FS)),
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TSInfo(TM.getDataLayout()), TLInfo(TM, *this) {}
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/// ClassifyGlobalReference - Find the target operand flags that describe
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/// how a global value should be referenced for the current subtarget.
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unsigned char
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AArch64Subtarget::ClassifyGlobalReference(const GlobalValue *GV,
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const TargetMachine &TM) const {
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bool isDecl = GV->isDeclarationForLinker();
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// MachO large model always goes via a GOT, simply to get a single 8-byte
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// absolute relocation on all global addresses.
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if (TM.getCodeModel() == CodeModel::Large && isTargetMachO())
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return AArch64II::MO_GOT;
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// The small code mode's direct accesses use ADRP, which cannot necessarily
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// produce the value 0 (if the code is above 4GB).
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if (TM.getCodeModel() == CodeModel::Small &&
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GV->isWeakForLinker() && isDecl) {
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// In PIC mode use the GOT, but in absolute mode use a constant pool load.
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if (TM.getRelocationModel() == Reloc::Static)
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return AArch64II::MO_CONSTPOOL;
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else
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return AArch64II::MO_GOT;
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}
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// If symbol visibility is hidden, the extra load is not needed if
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// the symbol is definitely defined in the current translation unit.
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// The handling of non-hidden symbols in PIC mode is rather target-dependent:
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// + On MachO, if the symbol is defined in this module the GOT can be
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// skipped.
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// + On ELF, the R_AARCH64_COPY relocation means that even symbols actually
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// defined could end up in unexpected places. Use a GOT.
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if (TM.getRelocationModel() != Reloc::Static && GV->hasDefaultVisibility()) {
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if (isTargetMachO())
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return (isDecl || GV->isWeakForLinker()) ? AArch64II::MO_GOT
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: AArch64II::MO_NO_FLAG;
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else
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// No need to go through the GOT for local symbols on ELF.
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return GV->hasLocalLinkage() ? AArch64II::MO_NO_FLAG : AArch64II::MO_GOT;
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}
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return AArch64II::MO_NO_FLAG;
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}
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/// This function returns the name of a function which has an interface
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/// like the non-standard bzero function, if such a function exists on
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/// the current subtarget and it is considered prefereable over
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/// memset with zero passed as the second argument. Otherwise it
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/// returns null.
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const char *AArch64Subtarget::getBZeroEntry() const {
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// Prefer bzero on Darwin only.
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if(isTargetDarwin())
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return "bzero";
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return nullptr;
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}
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void AArch64Subtarget::overrideSchedPolicy(MachineSchedPolicy &Policy,
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MachineInstr *begin, MachineInstr *end,
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unsigned NumRegionInstrs) const {
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// LNT run (at least on Cyclone) showed reasonably significant gains for
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// bi-directional scheduling. 253.perlbmk.
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Policy.OnlyTopDown = false;
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Policy.OnlyBottomUp = false;
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}
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bool AArch64Subtarget::enableEarlyIfConversion() const {
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return EnableEarlyIfConvert;
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}
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std::unique_ptr<PBQPRAConstraint>
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AArch64Subtarget::getCustomPBQPConstraints() const {
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if (!isCortexA57())
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return nullptr;
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return llvm::make_unique<A57ChainingConstraint>();
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}
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