llvm-6502/test/CodeGen/AArch64
2014-02-14 09:41:15 +00:00
..
128bit_load_store.ll
adc.ll
addsub_ext.ll
addsub-shifted.ll
addsub.ll
alloca.ll
analyze-branch.ll
assertion-rc-mismatch.ll
atomic-ops-not-barriers.ll
atomic-ops.ll
basic-pic.ll
bitfield-insert-0.ll
bitfield-insert.ll
bitfield.ll
blockaddress.ll
bool-loads.ll
breg.ll
callee-save.ll
code-model-large-abs.ll
compare-branch.ll
complex-copy-noneon.ll
concatvector-v8i8-bug.ll [AArch64] Removed unused i8 type from FPR8 register class. 2014-01-24 22:36:53 +00:00
cond-sel.ll
cpus.ll llvm/test/CodeGen/AArch64/cpus.ll: Tweak to use -mtriple=aarch64-unknown-unknown, or this would crash for targeting pecoff like *-mingw32. 2014-02-13 11:06:23 +00:00
directcond.ll
dp1.ll
dp2.ll
dp-3source.ll
extern-weak.ll
extract.ll
fastcc-reserved.ll
fastcc.ll
fcmp.ll
fcvt-fixed.ll
fcvt-int.ll
flags-multiuse.ll
floatdp_1source.ll
floatdp_2source.ll
fp128-folding.ll
fp128.ll
fp-cond-sel.ll
fp-dp3.ll [AArch64] Check fmul node single use in fused multiply patterns 2013-12-24 00:47:29 +00:00
fpimm.ll
frameaddr.ll
func-argpassing.ll
func-calls.ll
global-alignment.ll
got-abuse.ll
i128-align.ll
illegal-float-ops.ll
init-array.ll Make sure -use-init-array has intended effect on all AArch64 ELF targets, not just linux. 2014-01-10 13:41:49 +00:00
inline-asm-constraints-badI.ll
inline-asm-constraints-badK2.ll
inline-asm-constraints-badK.ll
inline-asm-constraints-badL.ll
inline-asm-constraints.ll Re-commit: Demote EmitRawText call in AsmPrinter::EmitInlineAsm() and remove hasRawTextSupport() call 2014-02-13 14:44:26 +00:00
inline-asm-modifiers.ll Re-commit: Demote EmitRawText call in AsmPrinter::EmitInlineAsm() and remove hasRawTextSupport() call 2014-02-13 14:44:26 +00:00
jump-table.ll
large-consts.ll
large-frame.ll Convert CodeGen/*/*.ll tests to use the new CHECK-LABEL for easier debugging. No functionality change and all tests pass after conversion. 2013-07-13 20:38:47 +00:00
ldst-regoffset.ll
ldst-unscaledimm.ll
ldst-unsignedimm.ll
lit.local.cfg
literal_pools.ll
local_vars.ll
logical_shifted_reg.ll
logical-imm.ll
mature-mc-support.ll Specify a triple. MachO AArch64 support is missing. 2014-02-13 15:30:06 +00:00
movw-consts.ll
movw-shift-encoding.ll
mul-lohi.ll AArch64: don't try to handle [SU]MUL_LOHI nodes 2014-01-14 22:53:22 +00:00
neon-2velem-high.ll
neon-2velem.ll [AArch64]Fix a problem that the register order of fmls/fmla by element is incorrect. 2013-12-25 07:12:34 +00:00
neon-3vdiff.ll
neon-aba-abd.ll
neon-across.ll
neon-add-pairwise.ll
neon-add-sub.ll [AArch64]Fix the problems that can't select mul/add/sub of v1i8/v1i16/v1i32 types. 2014-02-13 05:42:33 +00:00
neon-bitcast.ll
neon-bitwise-instructions.ll Teach the DAGCombiner how to fold 'vselect' dag nodes according 2014-01-08 18:33:04 +00:00
neon-bsl.ll [AArch64] Added vselect patterns with float and double types 2014-01-23 19:18:57 +00:00
neon-compare-instructions.ll
neon-copy.ll [AArch64]Implement the copy of two FPR8 registers by using FMOVss of two FPR32 registers in copyPhysReg. 2014-02-10 03:16:22 +00:00
neon-copyPhysReg-tuple.ll [AArch64]Add support to copy D tuples such as DPair/DTriple/DQuad and Q tuples such as QPair/QTriple/QQuad. There is no test case for D tuple as the original test cases are too large. As the copy of the D tuple is similar to the Q tuple, the correctness can be guaranteed. 2014-01-07 10:00:03 +00:00
neon-crypto.ll AArch64 & ARM: refactor crypto intrinsics to take scalars 2014-02-03 17:27:49 +00:00
neon-diagnostics.ll
neon-extract.ll [AArch64 NEON] Fix a bug caused by undef lane when generating VEXT. 2014-01-21 01:48:52 +00:00
neon-facge-facgt.ll ARM & AArch64: merge NEON absolute compare intrinsics 2014-02-04 14:55:42 +00:00
neon-fma.ll [AArch64] Check fmul node single use in fused multiply patterns 2013-12-24 00:47:29 +00:00
neon-fpround_f128.ll [AArch64 NEON] Add test case for vector FP_ROUND. 2014-01-26 02:23:33 +00:00
neon-frsqrt-frecp.ll
neon-halving-add-sub.ll
neon-load-store-v1i32.ll [AArch64]Fix the problem can't select f16_to_f32 and f32_to_f16. 2014-01-17 06:23:30 +00:00
neon-max-min-pairwise.ll
neon-max-min.ll
neon-misc-scalar.ll
neon-misc.ll [AArch64 NEON] Custom lower conversion between vector integer and vector floating point if element bit-width doesn't match. 2014-01-17 05:52:35 +00:00
neon-mla-mls.ll
neon-mov.ll
neon-mul-div.ll [AArch64]Fix the problems that can't select mul/add/sub of v1i8/v1i16/v1i32 types. 2014-02-13 05:42:33 +00:00
neon-or-combine.ll [AArch64] Fix assertion failure caused by an invalid comparison between APInt values. 2014-01-13 16:51:00 +00:00
neon-perm.ll [AArch64 NEON] Add more scenarios to use perm instructions when lowering shuffle_vector 2014-01-13 01:56:29 +00:00
neon-rounding-halving-add.ll
neon-rounding-shift.ll
neon-saturating-add-sub.ll
neon-saturating-rounding-shift.ll
neon-saturating-shift.ll
neon-scalar-abs.ll
neon-scalar-add-sub.ll
neon-scalar-by-elem-fma.ll
neon-scalar-by-elem-mul.ll
neon-scalar-compare.ll ARM & AArch64: merge NEON absolute compare intrinsics 2014-02-04 14:55:42 +00:00
neon-scalar-copy.ll For AArch64 Neon, simplify scalar dup by lane0 for fp. 2013-12-30 02:44:35 +00:00
neon-scalar-cvt.ll [AArch64] Refactor the NEON signed/unsigned floating-point convert to fixed-point 2013-12-10 21:33:56 +00:00
neon-scalar-ext.ll Improve pattern match from v1i8 to v1i32 for AArch64 Neon. 2014-01-26 04:55:53 +00:00
neon-scalar-extract-narrow.ll
neon-scalar-fabd.ll
neon-scalar-fcvt.ll
neon-scalar-fp-compare.ll [AArch64]The compare to zero intrinsics should be implemented by 'icmp/fcmp' and 'sext' not 'zext'. Modify the test cases. 2013-12-23 02:42:10 +00:00
neon-scalar-mul.ll
neon-scalar-neg.ll
neon-scalar-recip.ll
neon-scalar-reduce-pairwise.ll
neon-scalar-rounding-shift.ll
neon-scalar-saturating-add-sub.ll
neon-scalar-saturating-rounding-shift.ll
neon-scalar-saturating-shift.ll
neon-scalar-shift-imm.ll
neon-scalar-shift.ll Add missing pattern matches to support ACLE intrinsics of AArch64 NEON. 2013-12-25 01:22:51 +00:00
neon-select_cc.ll [AArch64 NEON] Fix a bug to avoid using floating type as condition type in lowering SELECT_CC. 2014-02-14 09:41:15 +00:00
neon-shift-left-long.ll Fix a bug in DAGcombiner about zero-extend after setcc. 2013-12-30 02:05:13 +00:00
neon-shift.ll
neon-shl-ashr-lshr.ll [AArch64]Fix the problems that can't select mul/add/sub of v1i8/v1i16/v1i32 types. 2014-02-13 05:42:33 +00:00
neon-simd-ldst-multi-elem.ll
neon-simd-ldst-one.ll Add missing pattern matches to support ACLE intrinsics of AArch64 NEON. 2013-12-25 01:22:51 +00:00
neon-simd-ldst.ll
neon-simd-post-ldst-multi-elem.ll
neon-simd-post-ldst-one.ll
neon-simd-shift.ll
neon-simd-tbl.ll
neon-simd-vget.ll
neon-spill-fpr8-fpr16.ll [AArch64]Add support for spilling FPR8/FPR16. 2014-02-13 02:36:58 +00:00
neon-truncStore-extLoad.ll
neon-v1i1-setcc.ll [AArch64]Fix the assertion failure caused by "v1i1 SETCC" DAG node. 2014-02-14 02:21:56 +00:00
neon-vector-list-spill.ll [AArch64]Add support to spill/fill D tuples such as DPair/DTriple/DQuad. There is no test cases for D tuple as the original test cases are too large. As the spill/fill of the D tuple is similar to the Q tuple, the correctness can be guaranteed. 2014-01-07 10:50:43 +00:00
pic-eh-stubs.ll
regress-bitcast-formals.ll
regress-f128csel-flags.ll
regress-fp128-livein.ll
regress-tail-livereg.ll
regress-tblgen-chains.ll
regress-w29-reserved-with-fp.ll
regress-wzr-allocatable.ll
returnaddr.ll
setcc-takes-i32.ll
sext_inreg.ll For AArch64, lowering sext_inreg and generate optimized code by using SXTL. 2014-01-15 05:08:01 +00:00
sibling-call.ll Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally. 2013-07-14 06:24:09 +00:00
sincos-expansion.ll
tail-call.ll
tls-dynamic-together.ll
tls-dynamics.ll
tls-execs.ll
tst-br.ll
variadic.ll Fix non-deterministic SDNodeOrder-dependent codegen 2014-01-12 14:09:17 +00:00
zero-reg.ll