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llvm-6502/lib/Target/Mips
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Vladimir Medic 90b1086b93 This patch introduces RegisterOperand class into Mips FPU instruction definitions and adds dedicated parser methods to MipsAsmParser. It is the first in a series of patches that should fix the problems with parsing Mips FPU instructions and optimize the code in MipsAsmParser. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184716 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-24 10:05:34 +00:00
..
AsmParser
This patch introduces RegisterOperand class into Mips FPU instruction definitions and adds dedicated parser methods to MipsAsmParser. It is the first in a series of patches that should fix the problems with parsing Mips FPU instructions and optimize the code in MipsAsmParser.
2013-06-24 10:05:34 +00:00
Disassembler
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InstPrinter
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MCTargetDesc
Mips ELF: Mark object file as ABI compliant
2013-06-18 19:47:15 +00:00
TargetInfo
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CMakeLists.txt
Fix CMakeLists.
2013-06-11 22:36:30 +00:00
LLVMBuild.txt
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Makefile
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MicroMipsInstrFormats.td
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MicroMipsInstrInfo.td
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Mips16FrameLowering.cpp
Use pointers to the MCAsmInfo and MCRegInfo.
2013-06-18 07:20:20 +00:00
Mips16FrameLowering.h
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Mips16HardFloat.cpp
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Mips16HardFloat.h
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Mips16InstrFormats.td
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Mips16InstrInfo.cpp
Don't cache the instruction and register info from the TargetMachine, because
2013-06-07 07:04:14 +00:00
Mips16InstrInfo.h
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Mips16InstrInfo.td
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Mips16ISelDAGToDAG.cpp
Access the TargetLoweringInfo from the TargetMachine object instead of caching it. The TLI may change between functions. No functionality change.
2013-06-19 21:36:55 +00:00
Mips16ISelDAGToDAG.h
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Mips16ISelLowering.cpp
Mips: Remove global set.
2013-06-13 19:06:52 +00:00
Mips16ISelLowering.h
Mips: Remove global set.
2013-06-13 19:06:52 +00:00
Mips16RegisterInfo.cpp
Don't cache the instruction and register info from the TargetMachine, because
2013-06-07 07:04:14 +00:00
Mips16RegisterInfo.h
Don't cache the instruction and register info from the TargetMachine, because
2013-06-07 07:04:14 +00:00
Mips64InstrInfo.td
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Mips.h
[mips] Add an IR transformation pass that optimizes calls to sqrt.
2013-06-11 22:21:44 +00:00
Mips.td
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MipsAnalyzeImmediate.cpp
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MipsAnalyzeImmediate.h
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MipsAsmPrinter.cpp
Mips ELF: Mark object file as ABI compliant
2013-06-18 19:47:15 +00:00
MipsAsmPrinter.h
DebugInfo: remove target-specific Frame Index handling for DBG_VALUE MachineInstrs
2013-06-16 20:34:27 +00:00
MipsCallingConv.td
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MipsCodeEmitter.cpp
Don't cache the instruction and register info from the TargetMachine, because
2013-06-07 07:04:14 +00:00
MipsCondMov.td
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MipsConstantIslandPass.cpp
Don't cache the instruction and register info from the TargetMachine, because
2013-06-07 07:04:14 +00:00
MipsDelaySlotFiller.cpp
Don't cache the instruction and register info from the TargetMachine, because
2013-06-07 07:04:14 +00:00
MipsDSPInstrFormats.td
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MipsDSPInstrInfo.td
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MipsFrameLowering.cpp
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MipsFrameLowering.h
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MipsInstrFormats.td
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MipsInstrFPU.td
This patch introduces RegisterOperand class into Mips FPU instruction definitions and adds dedicated parser methods to MipsAsmParser. It is the first in a series of patches that should fix the problems with parsing Mips FPU instructions and optimize the code in MipsAsmParser.
2013-06-24 10:05:34 +00:00
MipsInstrInfo.cpp
DebugInfo: remove target-specific Frame Index handling for DBG_VALUE MachineInstrs
2013-06-16 20:34:27 +00:00
MipsInstrInfo.h
DebugInfo: remove target-specific Frame Index handling for DBG_VALUE MachineInstrs
2013-06-16 20:34:27 +00:00
MipsInstrInfo.td
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MipsISelDAGToDAG.cpp
Access the TargetLoweringInfo from the TargetMachine object instead of caching it. The TLI may change between functions. No functionality change.
2013-06-19 21:36:55 +00:00
MipsISelDAGToDAG.h
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MipsISelLowering.cpp
The getRegForInlineAsmConstraint function should only accept MVT value types.
2013-06-22 18:37:38 +00:00
MipsISelLowering.h
The getRegForInlineAsmConstraint function should only accept MVT value types.
2013-06-22 18:37:38 +00:00
MipsJITInfo.cpp
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MipsJITInfo.h
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MipsLongBranch.cpp
Don't cache the instruction and register info from the TargetMachine, because
2013-06-07 07:04:14 +00:00
MipsMachineFunction.cpp
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MipsMachineFunction.h
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MipsMCInstLower.cpp
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MipsMCInstLower.h
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MipsModuleISelDAGToDAG.cpp
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MipsModuleISelDAGToDAG.h
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MipsOptimizeMathLibCalls.cpp
[mips] Add an IR transformation pass that optimizes calls to sqrt.
2013-06-11 22:21:44 +00:00
MipsOs16.cpp
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MipsOs16.h
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MipsRegisterInfo.cpp
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MipsRegisterInfo.h
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MipsRegisterInfo.td
This patch introduces RegisterOperand class into Mips FPU instruction definitions and adds dedicated parser methods to MipsAsmParser. It is the first in a series of patches that should fix the problems with parsing Mips FPU instructions and optimize the code in MipsAsmParser.
2013-06-24 10:05:34 +00:00
MipsRelocations.h
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MipsSchedule.td
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MipsSEFrameLowering.cpp
Use pointers to the MCAsmInfo and MCRegInfo.
2013-06-18 07:20:20 +00:00
MipsSEFrameLowering.h
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MipsSEInstrInfo.cpp
[mips] Use function TargetInstrInfo::getRegClass.
2013-06-11 18:48:16 +00:00
MipsSEInstrInfo.h
[mips] Use function TargetInstrInfo::getRegClass.
2013-06-11 18:48:16 +00:00
MipsSEISelDAGToDAG.cpp
Access the TargetLoweringInfo from the TargetMachine object instead of caching it. The TLI may change between functions. No functionality change.
2013-06-19 21:36:55 +00:00
MipsSEISelDAGToDAG.h
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MipsSEISelLowering.cpp
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MipsSEISelLowering.h
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MipsSelectionDAGInfo.cpp
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MipsSelectionDAGInfo.h
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MipsSERegisterInfo.cpp
Don't cache the instruction and register info from the TargetMachine, because
2013-06-07 07:04:14 +00:00
MipsSERegisterInfo.h
Don't cache the instruction and register info from the TargetMachine, because
2013-06-07 07:04:14 +00:00
MipsSubtarget.cpp
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MipsSubtarget.h
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MipsTargetMachine.cpp
[mips] Add an IR transformation pass that optimizes calls to sqrt.
2013-06-11 22:21:44 +00:00
MipsTargetMachine.h
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MipsTargetObjectFile.cpp
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MipsTargetObjectFile.h
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