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llvm-6502/test/CodeGen/R600/llvm.AMDGPU.imin.ll
T
Tom Stellard 0c05d9a265 Merging r227214:
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r227214 | marek.olsak | 2015-01-27 12:27:15 -0500 (Tue, 27 Jan 2015) | 2
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R600/SI: Enable all tests that pass on VI without changes

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_36@233734 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-31 19:12:49 +00:00

34 lines
1.1 KiB
LLVM

; RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck -check-prefix=SI %s
; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck -check-prefix=SI %s
; SI-LABEL: {{^}}vector_imin:
; SI: v_min_i32_e32
define void @vector_imin(i32 %p0, i32 %p1, i32 addrspace(1)* %in) #0 {
main_body:
%load = load i32 addrspace(1)* %in, align 4
%min = call i32 @llvm.AMDGPU.imin(i32 %p0, i32 %load)
%bc = bitcast i32 %min to float
call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %bc, float %bc, float %bc, float %bc)
ret void
}
; SI-LABEL: {{^}}scalar_imin:
; SI: s_min_i32
define void @scalar_imin(i32 %p0, i32 %p1) #0 {
entry:
%min = call i32 @llvm.AMDGPU.imin(i32 %p0, i32 %p1)
%bc = bitcast i32 %min to float
call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %bc, float %bc, float %bc, float %bc)
ret void
}
; Function Attrs: readnone
declare i32 @llvm.AMDGPU.imin(i32, i32) #1
declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
attributes #0 = { nounwind }
attributes #1 = { nounwind readnone }
!0 = !{!"const", null, i32 1}