Zoran Jovanovic e2db3024be [mips][microMIPS] Implement ADDIUS5 instruction ...

Differential Revision: http://reviews.llvm.org/D5049


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219495 91177308-0d34-0410-b5e6-96231b3b80d8

2014-10-10 13:45:34 +00:00

..

AArch64

[AArch64] Allow access to all system registers with MRS/MSR instructions.

2014-10-01 10:13:59 +00:00

ARM

Revert "Revert "DI: Fold constant arguments into a single MDString""

2014-10-03 20:01:09 +00:00

AsmParser

MC: AsmLexer: handle multi-character CommentStrings correctly

2014-08-14 02:51:43 +00:00

COFF

Fix COFF section index relocation should be 16 bits, not 32

2014-10-08 18:01:49 +00:00

Disassembler

[X86] Fix a bug where the disassembler was ignoring the VEX.W bit in 32-bit mode for certain instructions it shouldn't.

2014-10-07 07:29:50 +00:00

ELF

Revert "Revert "DI: Fold constant arguments into a single MDString""

2014-10-03 20:01:09 +00:00

MachO

MachObjectWriter: optimize the string table for common suffices

2014-10-06 17:05:19 +00:00

Markup

MC: Simple example parser for MC assembly markup.

2012-10-31 23:24:13 +00:00

Mips

[mips][microMIPS] Implement ADDIUS5 instruction

2014-10-10 13:45:34 +00:00

PowerPC

[PPC64] VSX indexed-form loads use wrong instruction format

2014-10-09 17:51:35 +00:00

Sparc

Reduce verbiage of lit.local.cfg files

2014-06-09 22:42:55 +00:00

SystemZ

Exclude known and bugzilled failures from UBSan bootstrap

2014-09-17 20:17:52 +00:00

X86

[AVX512] Extended avx512_binop_rm for AVX512VL subsets.

2014-10-09 08:38:48 +00:00