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https://github.com/c64scene-ar/llvm-6502.git
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58a2cbef4a
utils/sort_includes.py script. Most of these are updating the new R600 target and fixing up a few regressions that have creeped in since the last time I sorted the includes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171362 91177308-0d34-0410-b5e6-96231b3b80d8
105 lines
3.5 KiB
C++
105 lines
3.5 KiB
C++
//===-- XCoreMCTargetDesc.cpp - XCore Target Descriptions -----------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file provides XCore specific target descriptions.
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//
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//===----------------------------------------------------------------------===//
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#include "XCoreMCTargetDesc.h"
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#include "InstPrinter/XCoreInstPrinter.h"
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#include "XCoreMCAsmInfo.h"
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#include "llvm/MC/MCCodeGenInfo.h"
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#include "llvm/MC/MCInstrInfo.h"
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#include "llvm/MC/MCRegisterInfo.h"
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#include "llvm/MC/MCSubtargetInfo.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/TargetRegistry.h"
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#define GET_INSTRINFO_MC_DESC
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#include "XCoreGenInstrInfo.inc"
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#define GET_SUBTARGETINFO_MC_DESC
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#include "XCoreGenSubtargetInfo.inc"
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#define GET_REGINFO_MC_DESC
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#include "XCoreGenRegisterInfo.inc"
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using namespace llvm;
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static MCInstrInfo *createXCoreMCInstrInfo() {
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MCInstrInfo *X = new MCInstrInfo();
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InitXCoreMCInstrInfo(X);
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return X;
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}
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static MCRegisterInfo *createXCoreMCRegisterInfo(StringRef TT) {
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MCRegisterInfo *X = new MCRegisterInfo();
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InitXCoreMCRegisterInfo(X, XCore::LR);
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return X;
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}
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static MCSubtargetInfo *createXCoreMCSubtargetInfo(StringRef TT, StringRef CPU,
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StringRef FS) {
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MCSubtargetInfo *X = new MCSubtargetInfo();
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InitXCoreMCSubtargetInfo(X, TT, CPU, FS);
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return X;
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}
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static MCAsmInfo *createXCoreMCAsmInfo(const Target &T, StringRef TT) {
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MCAsmInfo *MAI = new XCoreMCAsmInfo(T, TT);
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// Initial state of the frame pointer is SP.
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MachineLocation Dst(MachineLocation::VirtualFP);
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MachineLocation Src(XCore::SP, 0);
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MAI->addInitialFrameState(0, Dst, Src);
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return MAI;
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}
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static MCCodeGenInfo *createXCoreMCCodeGenInfo(StringRef TT, Reloc::Model RM,
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CodeModel::Model CM,
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CodeGenOpt::Level OL) {
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MCCodeGenInfo *X = new MCCodeGenInfo();
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X->InitMCCodeGenInfo(RM, CM, OL);
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return X;
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}
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static MCInstPrinter *createXCoreMCInstPrinter(const Target &T,
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unsigned SyntaxVariant,
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const MCAsmInfo &MAI,
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const MCInstrInfo &MII,
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const MCRegisterInfo &MRI,
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const MCSubtargetInfo &STI) {
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return new XCoreInstPrinter(MAI, MII, MRI);
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}
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// Force static initialization.
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extern "C" void LLVMInitializeXCoreTargetMC() {
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// Register the MC asm info.
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RegisterMCAsmInfoFn X(TheXCoreTarget, createXCoreMCAsmInfo);
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// Register the MC codegen info.
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TargetRegistry::RegisterMCCodeGenInfo(TheXCoreTarget,
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createXCoreMCCodeGenInfo);
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// Register the MC instruction info.
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TargetRegistry::RegisterMCInstrInfo(TheXCoreTarget, createXCoreMCInstrInfo);
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// Register the MC register info.
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TargetRegistry::RegisterMCRegInfo(TheXCoreTarget, createXCoreMCRegisterInfo);
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// Register the MC subtarget info.
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TargetRegistry::RegisterMCSubtargetInfo(TheXCoreTarget,
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createXCoreMCSubtargetInfo);
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// Register the MCInstPrinter
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TargetRegistry::RegisterMCInstPrinter(TheXCoreTarget,
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createXCoreMCInstPrinter);
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}
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