Scott Michel 8bf61e8c2a Add necessary 64-bit support so that gcc frontend compiles (mostly). Current ...

issue is operand promotion for setcc/select... but looks like the fundamental
stuff is implemented for CellSPU.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51884 91177308-0d34-0410-b5e6-96231b3b80d8

2008-06-02 22:18:03 +00:00

..

and_ops_more.ll

Update and_ops.ll according to the recent dagcombiner changes.

2008-04-28 23:26:22 +00:00

and_ops.ll

Update and_ops.ll according to the recent dagcombiner changes.

2008-04-28 23:26:22 +00:00

call_indirect.ll

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call.ll

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ctpop.ll

Upgrade these tests for the current intrinsic prototypes.

2008-04-14 18:19:18 +00:00

dg.exp

sabre brings to my attention that the 'tr' suffix is also obsolete

2008-05-20 21:00:03 +00:00

dp_farith.ll

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eqv.ll

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extract_elt.ll

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fcmp.ll

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fdiv.ll

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fneg-fabs.ll

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icmp8.ll

Add more patterns to match in the integer comparison test harnesses.

2008-03-20 00:51:36 +00:00

icmp16.ll

Add more patterns to match in the integer comparison test harnesses.

2008-03-20 00:51:36 +00:00

icmp32.ll

Add more patterns to match in the integer comparison test harnesses.

2008-03-20 00:51:36 +00:00

immed16.ll

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immed32.ll

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immed64.ll

Add necessary 64-bit support so that gcc frontend compiles (mostly). Current

2008-06-02 22:18:03 +00:00

int2fp.ll

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intrinsics_branch.ll

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intrinsics_float.ll

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intrinsics_logical.ll

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mul_ops.ll

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nand.ll

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or_ops.ll

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rotate_ops.ll

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select_bits.ll

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shift_ops.ll

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sp_farith.ll

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struct_1.ll

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vec_const.ll

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vecinsert.ll

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