Bruno Cardoso Lopes e87de41189 let the '!eq' expression support 'int' and 'bit' types ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106171 91177308-0d34-0410-b5e6-96231b3b80d8

2010-06-16 23:24:12 +00:00

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Analysis

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Archive

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Assembler

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Bindings/Ocaml

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Bitcode

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BugPoint

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CodeGen

Allow a register to be redefined multiple times in a basic block.

2010-06-16 21:29:40 +00:00

DebugInfo

Be specific. Use FileCheck.

2010-06-16 19:39:45 +00:00

ExecutionEngine

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Feature

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FrontendAda

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FrontendC

Update test to match recent llvm-gcc change.

2010-06-15 22:16:40 +00:00

FrontendC++

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FrontendFortran

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FrontendObjC

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FrontendObjC++

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Integer

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lib

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Linker

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LLVMC

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MC

More AVX: {ADD,SUB,MUL,DIV}{PD,PS}rm

2010-06-12 01:53:48 +00:00

Other

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Scripts

tests: Run macho-dump with binary unbuffered streams on Windows, I can't find a Python 2.6 way to change stdin to binary.

2010-06-12 17:05:28 +00:00

TableGen

let the '!eq' expression support 'int' and 'bit' types

2010-06-16 23:24:12 +00:00

Transforms

Make sure that simplify libcalls does not replace a call with one calling

2010-06-16 19:34:01 +00:00

Unit

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Verifier

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CMakeLists.txt

tests: Propogate LLVM_SRC_ROOT and PYTHON_EXECUTABLE environment variables to tests.

2010-06-12 16:21:19 +00:00

lit.cfg

tests: Propogate LLVM_SRC_ROOT and PYTHON_EXECUTABLE environment variables to tests.

2010-06-12 16:21:19 +00:00

lit.site.cfg.in

tests: Propogate LLVM_SRC_ROOT and PYTHON_EXECUTABLE environment variables to tests.

2010-06-12 16:21:19 +00:00

Makefile

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Makefile.tests

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site.exp.in

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TestRunner.sh

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