Richard Barton 485333df71 Add hint disassembly syntax for 16-bit Thumb hint instructions. ...

Patch by Artyom Skrobov



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192972 91177308-0d34-0410-b5e6-96231b3b80d8

2013-10-18 14:09:49 +00:00

..

AArch64

[AArch64] Add support for NEON scalar extract narrow instructions.

2013-10-18 14:03:24 +00:00

ARM

Add hint disassembly syntax for 16-bit Thumb hint instructions.

2013-10-18 14:09:49 +00:00

Mips

Mips: Disassemble sign-extended 64 bit immediates properly.

2013-10-11 19:05:08 +00:00

SystemZ

[SystemZ] Add comparisons of high words and memory

2013-10-01 15:00:44 +00:00

X86

Add disassembler support for SSE4.1 register/register form of PEXTRW. There is a shorter encoding that was part of SSE2, but a memory form was added in SSE4.1. This is the register form of that encoding.

2013-10-14 01:42:32 +00:00

XCore

[tests] Cleanup initialization of test suffixes.

2013-08-16 00:37:11 +00:00