6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-01-10 18:34:09 +00:00
Code Issues Projects Releases Wiki Activity
llvm-6502/test/CodeGen/X86
History
Evan Cheng e57187cbe3 CreateVirtualRegisters does trivial copy coalescing. If a node def is used by a single CopyToReg, it reuses the virtual register assigned to the CopyToReg. This won't work for SDNode that is a clone or is itself cloned. Disable this optimization for those nodes or it can end up with non-SSA machine instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62356 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-16 20:57:18 +00:00
..
2to3-inc64.ll
Revert r42653 and forward-port the code that lets INC64_32r be
2009-01-06 23:34:46 +00:00
2002-12-23-LocalRAProblem.ll
…
2002-12-23-SubProblem.ll
…
2003-08-03-CallArgLiveRanges.ll
…
2003-08-23-DeadBlockTest.ll
…
2003-11-03-GlobalBool.ll
…
2004-02-12-Memcpy.ll
…
2004-02-13-FrameReturnAddress.ll
…
2004-02-14-InefficientStackPointer.ll
…
2004-02-22-Casts.ll
…
2004-03-30-Select-Max.ll
…
2004-04-09-SameValueCoalescing.ll
…
2004-04-13-FPCMOV-Crash.ll
…
2004-06-10-StackifierCrash.ll
…
2004-10-08-SelectSetCCFold.ll
…
2005-01-17-CycleInDAG.ll
…
2005-02-14-IllegalAssembler.ll
…
2005-05-08-FPStackifierPHI.ll
…
2006-01-19-ISelFoldingBug.ll
…
2006-03-01-InstrSchedBug.ll
…
2006-03-02-InstrSchedBug.ll
…
2006-04-04-CrossBlockCrash.ll
…
2006-04-27-ISelFoldingBug.ll
…
2006-05-01-SchedCausingSpills.ll
…
2006-05-02-InstrSched1.ll
…
2006-05-02-InstrSched2.ll
…
2006-05-08-CoalesceSubRegClass.ll
…
2006-05-08-InstrSched.ll
…
2006-05-11-InstrSched.ll
…
2006-05-17-VectorArg.ll
…
2006-05-22-FPSetEQ.ll
…
2006-05-25-CycleInDAG.ll
…
2006-07-10-InlineAsmAConstraint.ll
…
2006-07-12-InlineAsmQConstraint.ll
…
2006-07-19-ATTAsm.ll
Use DebugInfo interface to lower dbg_* intrinsics.
2009-01-13 00:32:17 +00:00
2006-07-20-InlineAsm.ll
…
2006-07-28-AsmPrint-Long-As-Pointer.ll
…
2006-07-31-SingleRegClass.ll
…
2006-08-07-CycleInDAG.ll
…
2006-08-16-CycleInDAG.ll
…
2006-08-21-ExtraMovInst.ll
…
2006-09-01-CycleInDAG.ll
…
2006-10-02-BoolRetCrash.ll
…
2006-10-07-ScalarSSEMiscompile.ll
…
2006-10-09-CycleInDAG.ll
…
2006-10-10-FindModifiedNodeSlotBug.ll
…
2006-10-12-CycleInDAG.ll
…
2006-10-13-CycleInDAG.ll
…
2006-10-19-SwitchUnnecessaryBranching.ll
…
2006-11-12-CSRetCC.ll
…
2006-11-17-IllegalMove.ll
…
2006-11-27-SelectLegalize.ll
…
2006-11-28-Memcpy.ll
…
2006-12-19-IntelSyntax.ll
…
2007-01-08-InstrSched.ll
…
2007-01-13-StackPtrIndex.ll
…
2007-01-29-InlineAsm-ir.ll
…
2007-02-04-OrAddrMode.ll
…
2007-02-19-LiveIntervalAssert.ll
…
2007-02-25-FastCCStack.ll
…
2007-03-01-SpillerCrash.ll
…
2007-03-15-GEP-Idx-Sink.ll
…
2007-03-16-InlineAsm.ll
…
2007-03-18-LiveIntervalAssert.ll
…
2007-03-24-InlineAsmMultiRegConstraint.ll
…
2007-03-24-InlineAsmPModifier.ll
…
2007-03-24-InlineAsmVectorOp.ll
…
2007-03-24-InlineAsmXConstraint.ll
…
2007-03-26-CoalescerBug.ll
…
2007-04-08-InlineAsmCrash.ll
…
2007-04-11-InlineAsmVectorResult.ll
…
2007-04-17-LiveIntervalAssert.ll
…
2007-04-24-Huge-Stack.ll
…
2007-04-24-VectorCrash.ll
…
2007-04-25-MMX-PADDQ.ll
…
2007-04-27-InlineAsm-IntMemInput.ll
…
2007-05-05-VecCastExpand.ll
…
2007-05-07-InvokeSRet.ll
…
2007-05-14-LiveIntervalAssert.ll
…
2007-05-15-maskmovq.ll
…
2007-05-17-ShuffleISelBug.ll
…
2007-06-04-tailmerge4.ll
…
2007-06-04-X86-64-CtorAsmBugs.ll
…
2007-06-05-LSR-Dominator.ll
…
2007-06-14-branchfold.ll
…
2007-06-15-IntToMMX.ll
…
2007-06-28-X86-64-isel.ll
…
2007-06-29-DAGCombinerBug.ll
…
2007-06-29-VecFPConstantCSEBug.ll
…
2007-07-03-GR64ToVR64.ll
…
2007-07-10-StackerAssert.ll
…
2007-07-18-Vector-Extract.ll
…
2007-08-01-LiveVariablesBug.ll
…
2007-08-09-IllegalX86-64Asm.ll
…
2007-08-10-SignExtSubreg.ll
…
2007-08-13-AppendingLinkage.ll
…
2007-08-13-SpillerReuse.ll
For whatever the reason, x86 CallingConv::Fast (i.e. fastcc) was not passing scalar arguments in registers. This patch defines a new fastcc CC which is slightly different from the FastCall CC. In addition to passing integer arguments in ECX and EDX, it also specify doubles are passed in 8-byte slots which are 8-byte aligned (instead of 4-byte aligned). This avoids a potential performance hazard where doubles span cacheline boundaries.
2008-09-04 22:59:58 +00:00
2007-09-03-X86-64-EhSelector.ll
…
2007-09-05-InvalidAsm.ll
…
2007-09-06-ExtWeakAliasee.ll
…
2007-09-17-ObjcFrameEH.ll
…
2007-09-18-ShuffleXformBug.ll
…
2007-09-27-LDIntrinsics.ll
…
2007-10-04-AvoidEFLAGSCopy.ll
…
2007-10-05-3AddrConvert.ll
…
2007-10-12-CoalesceExtSubReg.ll
…
2007-10-12-SpillerUnfold1.ll
…
2007-10-12-SpillerUnfold2.ll
…
2007-10-14-CoalescerCrash.ll
…
2007-10-15-CoalescerCrash.ll
…
2007-10-16-CoalescerCrash.ll
…
2007-10-16-fp80_select.ll
…
2007-10-16-IllegalAsm.ll
…
2007-10-17-IllegalAsm.ll
…
2007-10-19-SpillerUnfold.ll
…
2007-10-28-inlineasm-q-modifier.ll
…
2007-10-29-ExtendSetCC.ll
…
2007-10-30-LSRCrash.ll
…
2007-10-31-extractelement-i64.ll
…
2007-11-01-ISelCrash.ll
…
2007-11-02-BadAsm.ll
…
2007-11-03-x86-64-q-constraint.ll
…
2007-11-04-LiveIntervalCrash.ll
…
2007-11-04-LiveVariablesBug.ll
…
2007-11-04-rip-immediate-constant.ll
…
2007-11-06-InstrSched.ll
…
2007-11-07-MulBy4.ll
…
2007-11-14-Coalescer-Bug.ll
…
2007-11-30-LoadFolding-Bug.ll
…
2007-11-30-TestLoadFolding.ll
…
2007-12-11-FoldImpDefSpill.ll
…
2007-12-16-BURRSchedCrash.ll
…
2007-12-18-LoadCSEBug.ll
…
2008-01-08-IllegalCMP.ll
…
2008-01-08-SchedulerCrash.ll
…
2008-01-09-LongDoubleSin.ll
…
2008-01-16-FPStackifierAssert.ll
…
2008-01-16-InvalidDAGCombineXform.ll
…
2008-01-16-Trampoline.ll
…
2008-01-25-EmptyFunction.ll
…
2008-02-05-ISelCrash.ll
…
2008-02-06-LoadFoldingBug.ll
…
2008-02-08-LoadFoldingBug.ll
…
2008-02-14-BitMiscompile.ll
…
2008-02-18-TailMergingBug.ll
…
2008-02-20-InlineAsmClobber.ll
…
2008-02-22-LocalRegAllocBug.ll
…
2008-02-22-ReMatBug.ll
For whatever the reason, x86 CallingConv::Fast (i.e. fastcc) was not passing scalar arguments in registers. This patch defines a new fastcc CC which is slightly different from the FastCall CC. In addition to passing integer arguments in ECX and EDX, it also specify doubles are passed in 8-byte slots which are 8-byte aligned (instead of 4-byte aligned). This avoids a potential performance hazard where doubles span cacheline boundaries.
2008-09-04 22:59:58 +00:00
2008-02-25-InlineAsmBug.ll
…
2008-02-25-X86-64-CoalescerBug.ll
…
2008-02-26-AsmDirectMemOp.ll
…
2008-02-27-DeadSlotElimBug.ll
…
2008-02-27-PEICrash.ll
…
2008-03-06-frem-fpstack.ll
…
2008-03-07-APIntBug.ll
…
2008-03-10-RegAllocInfLoop.ll
…
2008-03-12-ThreadLocalAlias.ll
…
2008-03-13-TwoAddrPassCrash.ll
…
2008-03-14-SpillerCrash.ll
…
2008-03-18-CoalescerBug.ll
…
2008-03-19-DAGCombinerBug.ll
…
2008-03-23-DarwinAsmComments.ll
…
2008-03-25-TwoAddrPassBug.ll
…
2008-03-31-SpillerFoldingBug.ll
…
2008-04-02-unnamedEH.ll
…
2008-04-08-CoalescerCrash.ll
…
2008-04-09-BranchFolding.ll
…
2008-04-15-LiveVariableBug.ll
…
2008-04-16-CoalescerBug.ll
…
2008-04-16-ReMatBug.ll
…
2008-04-17-CoalescerBug.ll
…
2008-04-24-MemCpyBug.ll
…
2008-04-24-pblendw-fold-crash.ll
…
2008-04-26-Asm-Optimize-Imm.ll
…
2008-04-28-CoalescerBug.ll
…
2008-04-28-CyclicSchedUnit.ll
…
2008-05-01-InvalidOrdCompare.ll
…
2008-05-06-SpillerBug.ll
…
2008-05-09-PHIElimBug.ll
…
2008-05-09-ShuffleLoweringBug.ll
…
2008-05-12-tailmerge-5.ll
…
2008-05-21-CoalescerBug.ll
Remove -disable-fast-isel. Use cl::boolOrDefault with -fast-isel
2008-10-07 23:00:56 +00:00
2008-05-22-FoldUnalignedLoad.ll
…
2008-05-28-CoalescerBug.ll
…
2008-05-28-LocalRegAllocBug.ll
…
2008-06-04-MemCpyLoweringBug.ll
…
2008-06-13-NotVolatileLoadStore.ll
…
2008-06-13-VolatileLoadStore.ll
…
2008-06-16-SubregsBug.ll
…
2008-06-18-BadShuffle.ll
…
2008-06-25-VecISelBug.ll
…
2008-07-07-DanglingDeadInsts.ll
…
2008-07-09-ELFSectionAttributes.ll
…
2008-07-11-SHLBy1.ll
…
2008-07-11-SpillerBug.ll
…
2008-07-16-CoalescerCrash.ll
…
2008-07-19-movups-spills.ll
…
2008-07-22-CombinerCrash.ll
…
2008-07-23-VSetCC.ll
…
2008-08-05-SpillerBug.ll
…
2008-08-06-RewriterBug.ll
…
2008-08-17-UComiCodeGenBug.ll
…
2008-08-19-SubAndFetch.ll
…
2008-08-23-64Bit-maskmovq.ll
…
2008-08-23-X86-64AsmBug.ll
…
2008-08-25-AsmRegTypeMismatch.ll
…
2008-08-31-EH_RETURN32.ll
Revert r56675 - it breaks unwinding runtime everywhere.
2008-10-04 11:09:36 +00:00
2008-08-31-EH_RETURN64.ll
Revert r56675 - it breaks unwinding runtime everywhere.
2008-10-04 11:09:36 +00:00
2008-09-05-sinttofp-2xi32.ll
Fix for PR2687: Add patterns to match sint_to_fp and fp_to_sint for <2 x
2008-09-05 23:07:03 +00:00
2008-09-09-LinearScanBug.ll
Fix PR2757. Ignore liveinterval register allocation preference if the preference register is not in the right register class. This can happen due to sub-register coalescing.
2008-09-09 20:22:01 +00:00
2008-09-10-SpillerBug2.ll
Propagate subreg index when promoting a load to a copy.
2008-09-11 01:02:12 +00:00
2008-09-11-CoalescerBug2.ll
Fix PR2748. Avoid coalescing physical register with virtual register which would create illegal extract_subreg. e.g.
2008-09-11 20:07:10 +00:00
2008-09-11-CoalescerBug.ll
Fix PR2783 - coalescer bug. Missing a TargetRegisterInfo::isVirtualRegister check.
2008-09-11 18:40:32 +00:00
2008-09-17-inline-asm-1.ll
Remove SelectionDag early allocation of registers
2008-09-24 23:13:09 +00:00
2008-09-18-inline-asm-2.ll
Remove SelectionDag early allocation of registers
2008-09-24 23:13:09 +00:00
2008-09-19-RegAllocBug.ll
Fix PR2808. When regalloc runs out of register, it spill a physical register around the live interval being allocated. Do not continue to try to spill another register, just grab the physical register and move on.
2008-09-20 01:28:05 +00:00
2008-09-25-sseregparm-1.ll
Accept 'inreg' attribute on x86 functions as
2008-09-25 20:47:45 +00:00
2008-09-26-FrameAddrBug.ll
Re-apply 56683 with fixes.
2008-09-27 01:56:22 +00:00
2008-09-29-ReMatBug.ll
Re-apply 56835 along with header file changes.
2008-09-30 15:44:16 +00:00
2008-09-29-VolatileBug.ll
Fix PR2835. Do not change the width of a volatile load.
2008-09-29 17:26:18 +00:00
2008-10-02-Atomics32-2.ll
Handle some 64-bit atomics on x86-32, some of the time.
2008-10-02 18:53:47 +00:00
2008-10-06-MMXISelBug.ll
Fix PR2850 and PR2863. Only generate movddup for 128-bit SSE vector shuffles.
2008-10-06 21:13:08 +00:00
2008-10-06-x87ld-nan-1.ll
Be more precise about which conversions of NaNs
2008-10-06 22:59:10 +00:00
2008-10-06-x87ld-nan-2.ll
Be more precise about which conversions of NaNs
2008-10-06 22:59:10 +00:00
2008-10-07-SSEISelBug.ll
Certain patterns involving the "movss" instruction were marked as requiring SSE2, when in reality movss is an SSE1 instruction.
2008-10-07 16:14:11 +00:00
2008-10-11-CallCrash.ll
Change CALLSEQ_BEGIN and CALLSEQ_END to take TargetConstant's as
2008-10-11 22:08:30 +00:00
2008-10-13-CoalescerBug.ll
Also update sub-register intervals after a trivial computation is rematt'ed for a copy instruction. PR2775.
2008-10-13 18:35:52 +00:00
2008-10-16-SpillerBug.ll
Teach CodeGenPrepare to look through Bitcast instructions when attempting to
2008-11-26 00:26:16 +00:00
2008-10-16-VecUnaryOp.ll
Turn on LegalizeTypes, the new type legalization
2008-10-27 08:42:46 +00:00
2008-10-17-Asm64bitRConstraint.ll
Fix a bug where the x86 backend would reject 64-bit r constraints when
2008-10-17 17:59:52 +00:00
2008-10-20-AsmDoubleInI32.ll
Fix gcc.c-torture/compile/920520-1.c by inserting bitconverts
2008-10-21 00:45:36 +00:00
2008-10-24-FlippedCompare.ll
Turn on LegalizeTypes, the new type legalization
2008-10-27 08:42:46 +00:00
2008-10-27-CoalescerBug.ll
Remove val# defined by a remat'ed def that is now dead.
2008-10-27 23:21:01 +00:00
2008-10-27-StackRealignment.ll
Fix a nasty miscompilation of 176.gcc on linux/x86 where we synthesized
2008-10-28 05:49:35 +00:00
2008-10-29-ExpandVAARG.ll
Fix PR2977: LegalizeTypes support for expanding
2008-10-29 14:25:28 +00:00
2008-11-03-F80VAARG.ll
Make VAARG work with x86 long double (which is
2008-11-03 11:51:11 +00:00
2008-11-06-testb.ll
Fix the testb optimization so x86 also bootstraps.
2008-11-12 02:00:35 +00:00
2008-11-13-inlineasm-3.ll
testcase for PR 1779.
2008-11-13 22:17:10 +00:00
2008-11-29-DivideConstant16bit.ll
Fix for PR2164: allow transforming arbitrary-width unsigned divides into
2008-11-30 06:02:26 +00:00
2008-11-29-DivideConstant16bitSigned.ll
Followup to r60283: optimize arbitrary width signed divisions as well
2008-11-30 06:35:39 +00:00
2008-11-29-ULT-Sign.ll
APIntify a test which is potentially unsafe otherwise, and fix the
2008-11-30 04:59:26 +00:00
2008-12-01-loop-iv-used-outside-loop.ll
Add rdar reference, make this actually fail when the patch isn't applied.
2008-12-01 22:35:31 +00:00
2008-12-01-SpillerAssert.ll
Fix PR3124: overly strict assert.
2008-12-02 02:15:36 +00:00
2008-12-02-dagcombine-1.ll
testcases for recent dag combiner changes
2008-12-03 00:52:41 +00:00
2008-12-02-dagcombine-2.ll
testcases for recent dag combiner changes
2008-12-03 00:52:41 +00:00
2008-12-02-dagcombine-3.ll
testcases for recent dag combiner changes
2008-12-03 00:52:41 +00:00
2008-12-02-IllegalResultType.ll
Fix PR3117: not all nodes being legalized. The
2008-12-09 21:33:20 +00:00
2008-12-05-SpillerCrash.ll
This test also requires -mattr=+sse41.
2008-12-05 19:26:37 +00:00
2008-12-16-BadShift.ll
Fix for PR3225: disable a broken optimization in
2008-12-17 03:35:17 +00:00
2008-12-16-dagcombine-4.ll
A new dag combine; several permutations of this
2008-12-16 22:13:49 +00:00
2008-12-19-EarlyClobberBug.ll
Fix PR3149. If an early clobber def is a physical register and it is tied to an input operand, it effectively extends the live range of the physical register. Currently we do not have a good way to represent this.
2008-12-19 20:58:01 +00:00
2008-12-22-dagcombine-5.ll
One more permutation of subtracting off a base value.
2008-12-23 01:59:54 +00:00
2008-12-23-crazy-address.ll
Fix a compiler-abort on a testcase where the stack-pointer is added to
2008-12-24 00:27:51 +00:00
2008-12-23-dagcombine-6.ll
Add another permutation where we should get rid of a-a.
2008-12-23 23:01:27 +00:00
2009-01-12-CoalescerBug.ll
FIX llvm-gcc bootstrap on x86_64 linux. If a virtual register is copied to a physical register, it's not necessarily defined by a copy. We have to watch out it doesn't clobber any sub-register that might be live during its live interval. If the live interval crosses a basic block, then it's not safe to check with the less conservative check (by scanning uses and defs) because it's possible a sub-register might be live out of the block.
2009-01-13 03:57:45 +00:00
2009-01-13-DoubleUpdate.ll
When replacing uses and the same node is reached
2009-01-13 15:17:14 +00:00
2009-01-16-SchedulerBug.ll
CreateVirtualRegisters does trivial copy coalescing. If a node def is used by a single CopyToReg, it reuses the virtual register assigned to the CopyToReg. This won't work for SDNode that is a clone or is itself cloned. Disable this optimization for those nodes or it can end up with non-SSA machine instructions.
2009-01-16 20:57:18 +00:00
20081212.ll
Fix bug 3202.
2008-12-19 10:55:56 +00:00
add-trick32.ll
Fun x86 encoding tricks: when adding an immediate value of 128,
2008-10-17 01:33:43 +00:00
add-trick64.ll
Fun x86 encoding tricks: when adding an immediate value of 128,
2008-10-17 01:33:43 +00:00
add-with-overflow.ll
X86_COND_C and X86_COND_NC are alternate mnemonics for
2009-01-07 00:15:08 +00:00
aliases.ll
…
aligned-comm.ll
…
all-ones-vector.ll
nounwind-ify this test.
2008-10-01 15:07:14 +00:00
alloca-align-rounding.ll
…
and-or-fold.ll
…
arg-cast.ll
…
asm-block-labels.ll
…
asm-global-imm.ll
…
asm-indirect-mem.ll
…
atomic_op.ll
…
Atomics-32.ll
…
Atomics-64.ll
…
avoid-loop-align.ll
Avoid inserting noop's in the middle of a loop.
2008-11-27 01:16:00 +00:00
bitcast2.ll
…
bitcast-int-to-vector.ll
…
bitcast.ll
…
break-anti-dependencies.ll
Enable anti-dependence breaking by default when post-RA scheduling is enabled.
2008-12-16 06:21:45 +00:00
bswap.ll
…
bt.ll
Disable the register+memory forms of the bt instructions for now. Thanks
2009-01-13 23:23:30 +00:00
byval2.ll
…
byval3.ll
…
byval4.ll
…
byval5.ll
…
byval6.ll
…
byval7.ll
…
byval.ll
…
call-push.ll
…
clz.ll
…
cmp0.ll
…
cmp1.ll
…
cmp2.ll
…
cmp-test.ll
…
coalescer-commute1.ll
…
coalescer-commute2.ll
…
coalescer-commute3.ll
For whatever the reason, x86 CallingConv::Fast (i.e. fastcc) was not passing scalar arguments in registers. This patch defines a new fastcc CC which is slightly different from the FastCall CC. In addition to passing integer arguments in ECX and EDX, it also specify doubles are passed in 8-byte slots which are 8-byte aligned (instead of 4-byte aligned). This avoids a potential performance hazard where doubles span cacheline boundaries.
2008-09-04 22:59:58 +00:00
coalescer-commute4.ll
…
coalescer-commute5.ll
…
coalescer-remat.ll
Re-materalized definition instructions may be dead. Whack them.
2008-09-19 17:38:47 +00:00
combine-lds.ll
For whatever the reason, x86 CallingConv::Fast (i.e. fastcc) was not passing scalar arguments in registers. This patch defines a new fastcc CC which is slightly different from the FastCall CC. In addition to passing integer arguments in ECX and EDX, it also specify doubles are passed in 8-byte slots which are 8-byte aligned (instead of 4-byte aligned). This avoids a potential performance hazard where doubles span cacheline boundaries.
2008-09-04 22:59:58 +00:00
commute-cmov.ll
Add patterns to match conditional moves with loads folded
2009-01-07 01:00:24 +00:00
commute-intrinsic.ll
…
commute-two-addr.ll
…
compare_folding.ll
…
compare-add.ll
…
complex-fca.ll
Add a test case for _Complex passed as a FCA.
2008-10-13 18:13:07 +00:00
constant-pool-remat-0.ll
If SSE2 is available, x86 should pass first 3 f32/f64 arguments in XMM registers for fastcc calls.
2008-09-05 17:24:07 +00:00
copysign-zero.ll
…
critical-edge-split.ll
- CodeGenPrepare does not split loop back edges but it only knows about back edges of single block loops. It now does a DFS walk to find loop back edges.
2008-12-19 18:03:11 +00:00
dagcombine-cse.ll
…
darwin-bzero.ll
Moved this option to the front-end.
2008-10-01 01:02:18 +00:00
darwin-no-dead-strip.ll
…
darwin-stub.ll
No need to print function stubs for Mac OS X 10.5 and up. Linker will handle it.
2008-09-20 00:13:45 +00:00
dg.exp
…
div_const.ll
…
divrem.ll
…
dollar-name.ll
…
dyn-stackalloc.ll
…
epilogue.ll
…
extend.ll
…
extern_weak.ll
…
extmul64.ll
…
extmul128.ll
…
extractelement-from-arg.ll
…
extractelement-load.ll
…
extractelement-shuffle.ll
Fixed a bug when trying to optimize a extract vector element of a
2008-12-10 03:59:02 +00:00
extractps.ll
Use MOVSSmr instead of EXTRACTPSmr in the case of extracting
2008-10-31 00:57:24 +00:00
fabs.ll
…
fast-cc-callee-pops.ll
Remove code that pad number of bytes to pop for X86_FastCall CC. The code doesn't do the "aligning" for Cygwin, Mingw, and Windows. But aligning it on Darwin and Linux breaks gcc compatibility. That ruled out all the platforms we support!
2008-09-04 01:04:15 +00:00
fast-cc-merge-stack-adj.ll
…
fast-cc-pass-in-regs.ll
…
fast-isel-call.ll
Handle calls which produce i1 results: promote to i8 but and it with 1 to get the low bit.
2008-09-08 17:15:42 +00:00
fast-isel-gep-sext.ll
Factor out the code for sign-extending/truncating gep indices
2008-12-08 07:57:47 +00:00
fast-isel-mem.ll
Refactor X86SelectConstAddr, folding it into X86SelectAddress. This
2008-09-19 22:16:54 +00:00
fast-isel-phys.ll
Correctly handle physical register inputs. They are not explicit input operands in the resulting machine instrs.
2008-09-08 08:39:33 +00:00
fast-isel-shift-imm.ll
Fix fast-isel to not emit invalid assembly when presented with a
2008-12-20 17:19:40 +00:00
fast-isel-trunc.ll
Handle x86 truncate to i8 with target hook for now.
2008-09-07 08:47:42 +00:00
fast-isel.ll
Load from GV stub should be locally CSE'd.
2008-09-04 06:18:33 +00:00
fastcall-correct-mangling.ll
…
fastcc-2.ll
If SSE2 is available, x86 should pass first 3 f32/f64 arguments in XMM registers for fastcc calls.
2008-09-05 17:24:07 +00:00
fastcc-byval.ll
Fix byval arguments in the fastcc calling convention. The fastcc convention
2008-12-03 01:28:04 +00:00
fastcc-sret.ll
Fix a fastcc + sret bug. If fastcc and sret, callee doesn't need to pop the hidden struct ptr; Re-enable fastcc.
2008-09-10 18:25:29 +00:00
fastcc.ll
Fix test.
2008-09-05 20:04:37 +00:00
field-extract-use-trunc.ll
…
fildll.ll
…
fold-and-shift.ll
…
fold-call-2.ll
…
fold-call.ll
…
fold-imm.ll
On x86 favors folding short immediate into some arithmetic operations (e.g. add, and, xor, etc.) because materializing an immediate in a register is expensive in turns of code size.
2008-11-27 00:49:46 +00:00
fold-load.ll
Add -march=x86.
2008-11-27 00:37:06 +00:00
fold-mul-lohi.ll
…
fold-pcmpeqd-0.ll
Use a latency value of 0 for the artificial edges inserted by
2009-01-06 01:19:04 +00:00
fold-pcmpeqd-1.ll
Mark x86's V_SET0 and V_SETALLONES with isSimpleLoad, and teach X86's
2008-12-03 05:21:24 +00:00
fold-pcmpeqd-2.ll
Now that fold-pcmpeqd-0.ll is effectively testing that scheduling helps
2009-01-06 23:48:10 +00:00
fp2sint.ll
…
fp_constant_op.ll
…
fp_load_cast_fold.ll
…
fp_load_fold.ll
…
fp-immediate-shorten.ll
…
fp-in-intregs.ll
…
fp-stack-2results.ll
…
fp-stack-compare.ll
…
fp-stack-direct-ret.ll
…
fp-stack-ret-conv.ll
…
fp-stack-ret-store.ll
…
fp-stack-ret.ll
…
fp-stack-retcopy.ll
…
fsxor-alignment.ll
…
ga-offset.ll
Teach DAGCombine to fold constant offsets into GlobalAddress nodes,
2008-10-18 02:06:02 +00:00
hidden-vis-2.ll
Re-did 60519. It turns out Darwin's handling of hidden visibility symbols are a bit more complicate than I expected. Both declarations and weak definitions still need a stub indirection. However, the stubs are in data section and they contain the addresses of the actual symbols.
2008-12-05 01:06:39 +00:00
hidden-vis-3.ll
Re-did 60519. It turns out Darwin's handling of hidden visibility symbols are a bit more complicate than I expected. Both declarations and weak definitions still need a stub indirection. However, the stubs are in data section and they contain the addresses of the actual symbols.
2008-12-05 01:06:39 +00:00
hidden-vis-4.ll
Re-did 60519. It turns out Darwin's handling of hidden visibility symbols are a bit more complicate than I expected. Both declarations and weak definitions still need a stub indirection. However, the stubs are in data section and they contain the addresses of the actual symbols.
2008-12-05 01:06:39 +00:00
hidden-vis.ll
…
i2k.ll
Change how extended types are represented in MVTs. Instead of fiddling
2008-11-03 17:56:27 +00:00
i128-and-beyond.ll
Split this test and move it into target-specific directories.
2008-10-01 19:46:30 +00:00
i128-immediate.ll
…
i128-mul.ll
…
i128-ret.ll
…
i256-add.ll
Add a testcase for i256 add. i256 isn't fully supported in
2008-10-07 20:39:12 +00:00
iabs.ll
…
illegal-insert.ll
…
illegal-vector-args-return.ll
…
imp-def-copies.ll
…
imul-lea.ll
…
inline-asm-fpstack.ll
…
inline-asm-mrv.ll
…
inline-asm-pic.ll
Properly handle 'm' inline asm constraints. If a GV is being selected for the addressing mode, it requires the same logic for PIC relative addressing, etc.
2008-09-24 00:05:32 +00:00
inline-asm-x-scalar.ll
…
inline-asm.ll
Support x86 specific inline asm modifier 'J'.
2008-09-22 23:57:37 +00:00
ins_subreg_coalesce-1.ll
…
ins_subreg_coalesce-2.ll
…
ins_subreg_coalesce-3.ll
…
insertelement-copytoregs.ll
…
insertelement-legalize.ll
Added support to LegalizeType for expanding the operands of scalar to vector
2008-12-15 06:57:02 +00:00
invalid-shift-immediate.ll
…
isel-sink2.ll
Teach CodeGenPrepare to look through Bitcast instructions when attempting to
2008-11-26 00:26:16 +00:00
isel-sink3.ll
On x86 favors folding short immediate into some arithmetic operations (e.g. add, and, xor, etc.) because materializing an immediate in a register is expensive in turns of code size.
2008-11-27 00:49:46 +00:00
isel-sink.ll
…
isint.ll
Be kind to non-x86 hosts.
2008-10-24 21:20:25 +00:00
isnan2.ll
…
isnan.ll
…
ispositive.ll
…
jump_sign.ll
…
ldzero.ll
…
lea-2.ll
…
lea-3.ll
…
lea-recursion.ll
…
lea.ll
…
lfence.ll
…
local-liveness.ll
Remove the FlaggedNodes member from SUnit. Instead of requiring each SUnit
2008-11-13 23:24:17 +00:00
long-setcc.ll
…
longlong-deadload.ll
…
loop-hoist.ll
…
loop-strength-reduce2.ll
…
loop-strength-reduce3.ll
…
loop-strength-reduce4.ll
…
loop-strength-reduce5.ll
…
loop-strength-reduce6.ll
…
loop-strength-reduce-2.ll
Fix test to pass on Linux.
2008-12-05 22:38:21 +00:00
loop-strength-reduce-3.ll
Make LoopStrengthReduce smarter about hoisting things out of
2008-12-05 21:47:27 +00:00
loop-strength-reduce.ll
Make LoopStrengthReduce smarter about hoisting things out of
2008-12-05 21:47:27 +00:00
lsr-negative-stride.ll
…
memcpy-2.ll
…
memcpy.ll
…
memmove-0.ll
…
memmove-1.ll
…
memmove-2.ll
…
memmove-3.ll
…
memmove-4.ll
…
memset64-on-x86-32.ll
…
memset-2.ll
…
memset.ll
…
mfence.ll
…
mingw-alloca.ll
…
mmx-arg-passing2.ll
…
mmx-arg-passing.ll
…
mmx-arith.ll
…
mmx-bitcast-to-i64.ll
…
mmx-copy-gprs.ll
…
mmx-emms.ll
…
mmx-insert-element.ll
…
mmx-pinsrw.ll
…
mmx-punpckhdq.ll
…
mmx-s2v.ll
…
mmx-shift.ll
…
mmx-shuffle.ll
…
mmx-vzmovl-2.ll
Use mmx (punpckldq VR64, (mmx_v_set0)) to clear high 32-bits of a VR64 register.
2008-12-03 19:38:05 +00:00
mmx-vzmovl.ll
Add more vector move low and zero-extend patterns.
2008-11-05 06:04:51 +00:00
mul64.ll
…
mul128.ll
…
mul-legalize.ll
…
mul-remat.ll
…
mul-shift-reassoc.ll
…
multiple-return-values-cross-block.ll
…
multiple-return-values.ll
…
nancvt.ll
…
negative_zero.ll
…
negative-sin.ll
…
nofence.ll
…
opt-ext-uses.ll
…
optimize-smax.ll
Teach LSR to optimize away SMAX operations for tripcounts in common
2008-09-15 21:22:06 +00:00
or-branch.ll
…
overlap-shift.ll
…
packed_struct.ll
…
peep-vector-extract-concat.ll
…
peep-vector-extract-insert.ll
…
phys_subreg_coalesce-2.ll
Add test case from PR2659.
2009-01-09 21:01:31 +00:00
phys_subreg_coalesce.ll
The coalescer does not coalesce a virtual register to a physical register if any of the physical register's sub-register live intervals overlaps with the virtual register. This is overly conservative. It prevents a extract_subreg from being coalesced away:
2009-01-07 02:08:57 +00:00
pic_jumptable.ll
…
pic-1.ll
…
pic-2.ll
…
pic-3.ll
…
pic-4.ll
…
pic-5.ll
…
pic-6.ll
…
pic-cpool.ll
…
pic-jtbl.ll
…
pic-load-remat.ll
…
pmul.ll
Fix test to account for generating some vector code for mul v2i64 instead
2008-12-18 23:42:37 +00:00
postalloc-coalescing.ll
…
pr1462.ll
…
pr1489.ll
…
pr1505.ll
…
pr1505b.ll
…
pr2177.ll
…
pr2182.ll
…
pr2326.ll
…
pr2623.ll
…
pr2656.ll
…
pr2659.ll
PR2659 was fixed by r61847. Add the testcase as a regression test.
2009-01-09 08:16:12 +00:00
pr2849.ll
When doing the very-late shift-and address-mode optimization,
2008-10-13 20:52:04 +00:00
pr2924.ll
Fix SelectionDAGBuild lowering of Select instructions to
2008-10-21 20:00:42 +00:00
pr2982.ll
The ANDMask node folds to a constant, and isn't the node that needs to
2008-11-03 23:43:55 +00:00
pr3241.ll
Use the correct Preds and Succs lists in setHeightDirty()
2008-12-20 16:34:57 +00:00
pr3244.ll
Fix PR3241: Currently EmitCopyFromReg emits a copy from the physical register to a virtual register unless it requires an expensive cross class copy. That means we are only treating "expensive to copy" register dependency as physical register dependency.
2009-01-12 03:19:55 +00:00
pr3250.ll
Fix a DAGCombiner abort on an invalid shift count constant. This fixes PR3250.
2009-01-03 19:22:06 +00:00
pre-split1.ll
Avoid splitting an interval multiple times; avoid splitting re-materializable val# (for now).
2008-10-24 02:05:00 +00:00
pre-split2.ll
Add support for rematerialization in pre-alloc-splitting.
2008-11-19 04:28:29 +00:00
pre-split3.ll
- More pre-split fixes: spill slot live interval computation bug; restore point bug.
2008-10-29 08:39:34 +00:00
pre-split4.ll
If val# def is ~0U, meaning it's defined by a PHI, and it's previously split, spill before the barrier because it's impossible to determine if all the defs are spilled in the same spill slot.
2008-10-25 00:52:41 +00:00
pre-split5.ll
Handle cases where there aren't uses in the barrier mbb.
2008-10-25 23:49:39 +00:00
pre-split6.ll
Do not shrink wrap live interval in a mbb if it's livein any of its successor blocks. The mbb can be revisited again after all of the successors are processed.
2008-10-26 07:49:03 +00:00
pre-split7.ll
For now, don't split live intervals around x87 stack register barriers. FpGET_ST0_80 must be right after a call instruction (and ADJCALLSTACKUP) so we need to find a way to prevent reload of x87 registers between them.
2008-10-27 07:14:50 +00:00
pre-split8.ll
Avoid putting a split past the end of the live range; always shrink wrap live interval in the barrier mbb.
2008-10-28 00:47:49 +00:00
pre-split9.ll
Avoid putting a split past the end of the live range; always shrink wrap live interval in the barrier mbb.
2008-10-28 00:47:49 +00:00
pre-split10.ll
- More pre-split fixes: spill slot live interval computation bug; restore point bug.
2008-10-29 08:39:34 +00:00
prefetch.ll
…
private.ll
Add the private linkage.
2009-01-15 20:18:42 +00:00
rdtsc.ll
…
regpressure.ll
…
rem.ll
…
remat-constant.ll
…
remat-mov0.ll
Find loop back edges only after empty blocks are eliminated.
2009-01-05 21:17:27 +00:00
ret-addr.ll
Add support for non-zero __builtin_return_address values on X86.
2009-01-16 19:25:27 +00:00
ret-i64-0.ll
remove some unneeded eh generation
2008-10-21 03:49:19 +00:00
rot16.ll
Define patterns for shld and shrd that match immediate
2008-10-17 01:23:35 +00:00
rot32.ll
Define patterns for shld and shrd that match immediate
2008-10-17 01:23:35 +00:00
rot64.ll
Define patterns for shld and shrd that match immediate
2008-10-17 01:23:35 +00:00
rotate2.ll
…
rotate.ll
…
scalar_sse_minmax.ll
…
scalar-min-max-fill-operand.ll
…
select-zero-one.ll
…
select.ll
…
setoeq.ll
- Add target lowering hooks that specify which setcc conditions are illegal,
2008-10-15 02:05:31 +00:00
setuge.ll
…
sext-load.ll
…
sext-select.ll
…
sext-trunc.ll
…
sfence.ll
…
shift-and.ll
…
shift-coalesce.ll
…
shift-codegen.ll
…
shift-combine.ll
…
shift-double.ll
…
shift-folding.ll
…
shift-one.ll
…
shl_elim.ll
…
shrink-fp-const1.ll
…
shrink-fp-const2.ll
…
sincos.ll
…
small-byval-memcpy.ll
…
smul-with-overflow.ll
- Use patterns instead of creating completely new instruction matching patterns,
2008-12-12 21:15:41 +00:00
split-select.ll
…
split-vector-rem.ll
…
sret.ll
Fix a fastcc + sret bug. If fastcc and sret, callee doesn't need to pop the hidden struct ptr; Re-enable fastcc.
2008-09-10 18:25:29 +00:00
sse41-extractps-bitcast-0.ll
…
sse41-extractps-bitcast-1.ll
…
sse41-pmovx.ll
Use explicit target-triples to unbreak this test on non-darwin systems.
2008-10-01 00:25:38 +00:00
sse_reload_fold.ll
…
sse-align-0.ll
…
sse-align-1.ll
…
sse-align-2.ll
…
sse-align-3.ll
…
sse-align-4.ll
…
sse-align-5.ll
…
sse-align-6.ll
…
sse-align-7.ll
…
sse-align-8.ll
…
sse-align-9.ll
…
sse-align-10.ll
…
sse-align-11.ll
…
sse-align-12.ll
…
sse-fcopysign.ll
…
sse-load-ret.ll
…
sse-varargs.ll
…
stack-align.ll
…
store_op_load_fold2.ll
…
store_op_load_fold.ll
…
store-fp-constant.ll
…
store-global-address.ll
…
storetrunc-fp.ll
…
stride-nine-with-base-reg.ll
…
stride-reuse.ll
…
sub-with-overflow.ll
X86_COND_C and X86_COND_NC are alternate mnemonics for
2009-01-07 00:15:08 +00:00
subclass-coalesce.ll
…
subreg-to-reg-0.ll
…
subreg-to-reg-1.ll
…
tailcall1.ll
…
tailcall-stackalign.ll
Change the calling convention used when tail call optimization is enabled from CC_X86_32_TailCall to CC_X86_32_FastCC.
2008-09-22 14:50:07 +00:00
tailcallbyval64.ll
…
tailcallbyval.ll
Fix byval arguments in the fastcc calling convention. The fastcc convention
2008-12-03 01:28:04 +00:00
tailcallfp2.ll
Change the calling convention used when tail call optimization is enabled from CC_X86_32_TailCall to CC_X86_32_FastCC.
2008-09-22 14:50:07 +00:00
tailcallfp.ll
Add indirect tail call (function pointer) examples.
2008-09-11 22:24:28 +00:00
tailcallpic1.ll
…
tailcallpic2.ll
…
tailcallstack64.ll
…
test-nofold.ll
…
testl-commute.ll
add a testcase.
2009-01-07 01:48:08 +00:00
tls1.ll
…
tls2.ll
…
trap.ll
…
trunc-to-bool.ll
When promoting the result of fp_to_uint/fp_to_sint,
2008-11-10 17:28:30 +00:00
twoaddr-pass-sink.ll
…
twoaddr-remat.ll
…
uint_to_fp.ll
…
umul-with-carry.ll
- Use patterns instead of creating completely new instruction matching patterns,
2008-12-12 21:15:41 +00:00
urem-i8-constant.ll
Fix for PR2164: allow transforming arbitrary-width unsigned divides into
2008-11-30 06:02:26 +00:00
v4f32-immediate.ll
…
variable-sized-darwin-bzero.ll
…
variadic-node-pic.ll
…
vec_add.ll
…
vec_align.ll
…
vec_call.ll
…
vec_clear.ll
…
vec_ctbits.ll
…
vec_extract-sse4.ll
…
vec_extract.ll
Use movaps / movd to extract vector element 0 even with sse4.1. It's still cheaper than pextrw especially if the value is in memory.
2009-01-02 05:29:08 +00:00
vec_fneg.ll
…
vec_ins_extract.ll
…
vec_insert_4.ll
…
vec_insert-2.ll
Use movaps / movd to extract vector element 0 even with sse4.1. It's still cheaper than pextrw especially if the value is in memory.
2009-01-02 05:29:08 +00:00
vec_insert-3.ll
Use movaps / movd to extract vector element 0 even with sse4.1. It's still cheaper than pextrw especially if the value is in memory.
2009-01-02 05:29:08 +00:00
vec_insert-5.ll
…
vec_insert-6.ll
…
vec_insert-7.ll
…
vec_insert-8.ll
Expand insert/extract of a <4 x i32> with a variable index.
2009-01-15 21:10:20 +00:00
vec_insert.ll
Use movaps / movd to extract vector element 0 even with sse4.1. It's still cheaper than pextrw especially if the value is in memory.
2009-01-02 05:29:08 +00:00
vec_loadhl.ll
…
vec_logical.ll
…
vec_return.ll
…
vec_select.ll
…
vec_set-2.ll
…
vec_set-3.ll
…
vec_set-4.ll
…
vec_set-5.ll
…
vec_set-6.ll
…
vec_set-7.ll
…
vec_set-8.ll
…
vec_set-9.ll
Prefer movlhps over punpcklqdq, etc. in more cases.
2008-09-25 23:35:16 +00:00
vec_set-A.ll
…
vec_set-B.ll
…
vec_set-C.ll
…
vec_set-D.ll
…
vec_set-E.ll
…
vec_set-F.ll
…
vec_set-G.ll
…
vec_set-H.ll
…
vec_set-I.ll
…
vec_set-J.ll
…
vec_set.ll
…
vec_shift2.ll
…
vec_shift3.ll
…
vec_shift.ll
…
vec_shuffle-2.ll
…
vec_shuffle-3.ll
…
vec_shuffle-4.ll
…
vec_shuffle-5.ll
…
vec_shuffle-6.ll
…
vec_shuffle-7.ll
…
vec_shuffle-8.ll
…
vec_shuffle-9.ll
…
vec_shuffle-10.ll
…
vec_shuffle-11.ll
…
vec_shuffle-12.ll
Use movaps / movd to extract vector element 0 even with sse4.1. It's still cheaper than pextrw especially if the value is in memory.
2009-01-02 05:29:08 +00:00
vec_shuffle-13.ll
…
vec_shuffle-14.ll
…
vec_shuffle-15.ll
…
vec_shuffle-16.ll
…
vec_shuffle-17.ll
…
vec_shuffle-18.ll
…
vec_shuffle-19.ll
…
vec_shuffle-20.ll
…
vec_shuffle-21.ll
…
vec_shuffle-22.ll
With sse3 and when the source is a load or has multiple uses, favors movddup over shuffp*, pshufd, etc. Without sse3 or when the source is from a register, make use of movlhps
2008-09-25 20:50:48 +00:00
vec_shuffle-23.ll
Remove OptimizeForSize global. Use function attribute optsize.
2008-10-01 23:18:38 +00:00
vec_shuffle-24.ll
Remove OptimizeForSize global. Use function attribute optsize.
2008-10-01 23:18:38 +00:00
vec_shuffle-25.ll
Improved shuffle normalization to avoid using extract/build when we
2008-11-16 05:06:27 +00:00
vec_shuffle-26.ll
Improved shuffle normalization to avoid using extract/build when we
2008-11-16 05:06:27 +00:00
vec_shuffle-27.ll
Improved shuffle normalization to avoid using extract/build when we
2008-11-16 05:06:27 +00:00
vec_shuffle-28.ll
Use movaps / movd to extract vector element 0 even with sse4.1. It's still cheaper than pextrw especially if the value is in memory.
2009-01-02 05:29:08 +00:00
vec_shuffle.ll
…
vec_splat-2.ll
…
vec_splat-3.ll
Added shuffle and splat test cases for r61365.
2008-12-23 04:05:08 +00:00
vec_splat-4.ll
Added shuffle and splat test cases for r61365.
2008-12-23 04:05:08 +00:00
vec_splat.ll
…
vec_ss_load_fold.ll
…
vec_zero_cse.ll
…
vec_zero-2.ll
…
vec_zero.ll
…
vector-intrinsics.ll
…
vector-rem.ll
…
vector-variable-idx.ll
…
vector.ll
…
vfcmp.ll
…
volatile.ll
Fix a think-o in isSafeToMove. This fixes it from thinking that
2008-10-02 15:04:30 +00:00
vortex-bug.ll
…
vshift_scalar.ll
Added support for splitting and scalarizing vector shifts.
2008-12-15 21:44:00 +00:00
vshift_split2.ll
Added support for splitting and scalarizing vector shifts.
2008-12-15 21:44:00 +00:00
vshift_split.ll
Fix getNode to allow a vector for the shift amount for shifts of vectors.
2008-12-09 05:46:39 +00:00
weak.ll
…
widen_arith-1.ll
Use movaps / movd to extract vector element 0 even with sse4.1. It's still cheaper than pextrw especially if the value is in memory.
2009-01-02 05:29:08 +00:00
widen_arith-2.ll
Added some basic test cases for r61209
2008-12-18 20:05:58 +00:00
widen_arith-3.ll
Added some basic test cases for r61209
2008-12-18 20:05:58 +00:00
widen_arith-4.ll
Added some basic test cases for r61209
2008-12-18 20:05:58 +00:00
widen_arith-5.ll
Added some basic test cases for r61209
2008-12-18 20:05:58 +00:00
widen_arith-6.ll
Added some basic test cases for r61209
2008-12-18 20:05:58 +00:00
widen_cast-1.ll
Added some basic test cases for r61209
2008-12-18 20:05:58 +00:00
widen_cast-2.ll
Added some basic test cases for r61209
2008-12-18 20:05:58 +00:00
widen_cast-3.ll
Added some basic test cases for r61209
2008-12-18 20:05:58 +00:00
widen_cast-4.ll
Added some basic test cases for r61209
2008-12-18 20:05:58 +00:00
widen_cast-5.ll
Added some basic test cases for r61209
2008-12-18 20:05:58 +00:00
widen_cast-6.ll
Added missing support to widen an operand from a bit convert.
2009-01-15 22:43:38 +00:00
widen_conv-1.ll
Added some basic test cases for r61209
2008-12-18 20:05:58 +00:00
widen_conv-2.ll
Added some basic test cases for r61209
2008-12-18 20:05:58 +00:00
widen_conv-3.ll
Added some basic test cases for r61209
2008-12-18 20:05:58 +00:00
widen_conv-4.ll
Added some basic test cases for r61209
2008-12-18 20:05:58 +00:00
widen_select-1.ll
Added some basic test cases for r61209
2008-12-18 20:05:58 +00:00
widen_shuffle-1.ll
Added some basic test cases for r61209
2008-12-18 20:05:58 +00:00
widen_shuffle-2.ll
Added some basic test cases for r61209
2008-12-18 20:05:58 +00:00
x86-64-and-mask.ll
…
x86-64-arg.ll
…
x86-64-asm.ll
…
x86-64-dead-stack-adjust.ll
…
x86-64-disp.ll
Don't create TargetGlobalAddress nodes with offsets that don't fit
2008-10-21 03:38:42 +00:00
x86-64-frameaddr.ll
Re-apply 56683 with fixes.
2008-09-27 01:56:22 +00:00
x86-64-gv-offset.ll
…
x86-64-mem.ll
…
x86-64-pic-1.ll
…
x86-64-pic-2.ll
…
x86-64-pic-3.ll
…
x86-64-pic-4.ll
…
x86-64-pic-5.ll
…
x86-64-pic-6.ll
…
x86-64-pic-7.ll
…
x86-64-pic-8.ll
…
x86-64-pic-9.ll
…
x86-64-pic-10.ll
…
x86-64-pic-11.ll
…
x86-64-ret0.ll
…
x86-64-shortint.ll
…
x86-64-sret-return.ll
…
x86-64-varargs.ll
…
x86-frameaddr2.ll
Re-apply 56683 with fixes.
2008-09-27 01:56:22 +00:00
x86-frameaddr.ll
Re-apply 56683 with fixes.
2008-09-27 01:56:22 +00:00
xmm-r64.ll
…
xor_not.ll
…
xor-undef.ll
…
xorl.ll
…
zero-remat.ll
…
zext-inreg-0.ll
…
zext-inreg-1.ll
…