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https://github.com/c64scene-ar/llvm-6502.git
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aca2998f14
with a temporary assertion and adjust the various test cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197224 91177308-0d34-0410-b5e6-96231b3b80d8
73 lines
1.5 KiB
LLVM
73 lines
1.5 KiB
LLVM
; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
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define i32 @f1(i32 %a, i32 %b) {
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%tmp = xor i32 %b, 4294967295
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%tmp1 = or i32 %a, %tmp
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ret i32 %tmp1
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}
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; CHECK-LABEL: f1:
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; CHECK: orn r0, r0, r1
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define i32 @f2(i32 %a, i32 %b) {
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%tmp = xor i32 %b, 4294967295
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%tmp1 = or i32 %tmp, %a
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ret i32 %tmp1
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}
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; CHECK-LABEL: f2:
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; CHECK: orn r0, r0, r1
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define i32 @f3(i32 %a, i32 %b) {
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%tmp = xor i32 4294967295, %b
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%tmp1 = or i32 %a, %tmp
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ret i32 %tmp1
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}
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; CHECK-LABEL: f3:
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; CHECK: orn r0, r0, r1
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define i32 @f4(i32 %a, i32 %b) {
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%tmp = xor i32 4294967295, %b
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%tmp1 = or i32 %tmp, %a
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ret i32 %tmp1
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}
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; CHECK-LABEL: f4:
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; CHECK: orn r0, r0, r1
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define i32 @f5(i32 %a, i32 %b) {
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%tmp = shl i32 %b, 5
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%tmp1 = xor i32 4294967295, %tmp
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%tmp2 = or i32 %a, %tmp1
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ret i32 %tmp2
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}
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; CHECK-LABEL: f5:
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; CHECK: orn r0, r0, r1, lsl #5
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define i32 @f6(i32 %a, i32 %b) {
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%tmp = lshr i32 %b, 6
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%tmp1 = xor i32 4294967295, %tmp
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%tmp2 = or i32 %a, %tmp1
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ret i32 %tmp2
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}
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; CHECK-LABEL: f6:
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; CHECK: orn r0, r0, r1, lsr #6
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define i32 @f7(i32 %a, i32 %b) {
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%tmp = ashr i32 %b, 7
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%tmp1 = xor i32 4294967295, %tmp
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%tmp2 = or i32 %a, %tmp1
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ret i32 %tmp2
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}
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; CHECK-LABEL: f7:
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; CHECK: orn r0, r0, r1, asr #7
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define i32 @f8(i32 %a, i32 %b) {
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%l8 = shl i32 %a, 24
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%r8 = lshr i32 %a, 8
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%tmp = or i32 %l8, %r8
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%tmp1 = xor i32 4294967295, %tmp
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%tmp2 = or i32 %a, %tmp1
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ret i32 %tmp2
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}
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; CHECK-LABEL: f8:
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; CHECK: orn r0, r0, r0, ror #8
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