Jim Grosbach 6472a514dc X86: Tighten up test. ...

llc CPU autodection bites again. Speculative fix for bot failures.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205940 91177308-0d34-0410-b5e6-96231b3b80d8

2014-04-10 00:27:43 +00:00

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AArch64

[AArch64] Implement the isZExtFree APIs.

2014-04-09 20:51:21 +00:00

ARM

ARM: yet another round of ARM test clean ups

2014-04-03 23:47:24 +00:00

ARM64

[DAGCombiner] DAG combine does not know how to combine indexed loads with

2014-04-09 20:03:05 +00:00

CPP

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Generic

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Hexagon

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Inputs

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Mips

Re-commit: [mips] abs.[ds], and neg.[ds] should be allowed regardless of -enable-no-nans-fp-math

2014-04-09 09:56:43 +00:00

MSP430

Mark FPB as a reserved register when needed.

2014-04-02 13:13:56 +00:00

NVPTX

[NVPTX] Add preliminary intrinsics and codegen support for textures/surfaces

2014-04-09 15:39:15 +00:00

PowerPC

[PowerPC] Add a full condition code register to make the "cc" clobber work

2014-04-04 15:15:57 +00:00

R600

R600/SI: Match not instruction.

2014-04-09 07:16:16 +00:00

SPARC

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SystemZ

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Thumb

ARM: yet another round of ARM test clean ups

2014-04-03 23:47:24 +00:00

Thumb2

ARM: fix test case missed in previous roundup

2014-04-04 01:19:56 +00:00

X86

X86: Tighten up test.

2014-04-10 00:27:43 +00:00

XCore

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