mirror of
				https://github.com/c64scene-ar/llvm-6502.git
				synced 2025-10-30 16:17:05 +00:00 
			
		
		
		
	to finalize MI bundles (i.e. add BUNDLE instruction and computing register def and use lists of the BUNDLE instruction) and a pass to unpack bundles. - Teach more of MachineBasic and MachineInstr methods to be bundle aware. - Switch Thumb2 IT block to MI bundles and delete the hazard recognizer hack to prevent IT blocks from being broken apart. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146542 91177308-0d34-0410-b5e6-96231b3b80d8
		
			
				
	
	
		
			57 lines
		
	
	
		
			1.8 KiB
		
	
	
	
		
			C++
		
	
	
	
	
	
			
		
		
	
	
			57 lines
		
	
	
		
			1.8 KiB
		
	
	
	
		
			C++
		
	
	
	
	
	
| //===-- ARMHazardRecognizer.h - ARM Hazard Recognizers ----------*- C++ -*-===//
 | |
| //
 | |
| //                     The LLVM Compiler Infrastructure
 | |
| //
 | |
| // This file is distributed under the University of Illinois Open Source
 | |
| // License. See LICENSE.TXT for details.
 | |
| //
 | |
| //===----------------------------------------------------------------------===//
 | |
| //
 | |
| // This file defines hazard recognizers for scheduling ARM functions.
 | |
| //
 | |
| //===----------------------------------------------------------------------===//
 | |
| 
 | |
| #ifndef ARMHAZARDRECOGNIZER_H
 | |
| #define ARMHAZARDRECOGNIZER_H
 | |
| 
 | |
| #include "llvm/CodeGen/ScoreboardHazardRecognizer.h"
 | |
| 
 | |
| namespace llvm {
 | |
| 
 | |
| class ARMBaseInstrInfo;
 | |
| class ARMBaseRegisterInfo;
 | |
| class ARMSubtarget;
 | |
| class MachineInstr;
 | |
| 
 | |
| /// ARMHazardRecognizer handles special constraints that are not expressed in
 | |
| /// the scheduling itinerary. This is only used during postRA scheduling. The
 | |
| /// ARM preRA scheduler uses an unspecialized instance of the
 | |
| /// ScoreboardHazardRecognizer.
 | |
| class ARMHazardRecognizer : public ScoreboardHazardRecognizer {
 | |
|   const ARMBaseInstrInfo &TII;
 | |
|   const ARMBaseRegisterInfo &TRI;
 | |
|   const ARMSubtarget &STI;
 | |
| 
 | |
|   MachineInstr *LastMI;
 | |
|   unsigned FpMLxStalls;
 | |
| 
 | |
| public:
 | |
|   ARMHazardRecognizer(const InstrItineraryData *ItinData,
 | |
|                       const ARMBaseInstrInfo &tii,
 | |
|                       const ARMBaseRegisterInfo &tri,
 | |
|                       const ARMSubtarget &sti,
 | |
|                       const ScheduleDAG *DAG) :
 | |
|     ScoreboardHazardRecognizer(ItinData, DAG, "post-RA-sched"), TII(tii),
 | |
|     TRI(tri), STI(sti), LastMI(0) {}
 | |
| 
 | |
|   virtual HazardType getHazardType(SUnit *SU, int Stalls);
 | |
|   virtual void Reset();
 | |
|   virtual void EmitInstruction(SUnit *SU);
 | |
|   virtual void AdvanceCycle();
 | |
|   virtual void RecedeCycle();
 | |
| };
 | |
| 
 | |
| } // end namespace llvm
 | |
| 
 | |
| #endif // ARMHAZARDRECOGNIZER_H
 |