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llvm-6502/lib/Target/R600
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Christian Konig e9ba1830df R600/SI: nuke SReg_1 v3 
It's completely unnecessary and can be replace with proper
SReg_64 handling instead.

This actually fixes a piglit test on SI.

v2: use correct register class in addRegisterClass,
    set special classes as not allocatable
v3: revert setting special classes as not allocateable

This is a candidate for the stable branch.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175355 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-16 11:28:30 +00:00
..
InstPrinter
R600/SI: Fix int_SI_fs_interp_constant
2013-02-14 19:03:25 +00:00
MCTargetDesc
R600/SI: cleanup literal handling v3
2013-02-16 11:28:22 +00:00
TargetInfo
…
AMDGPU.h
R600/SI: cleanup literal handling v3
2013-02-16 11:28:22 +00:00
AMDGPU.td
…
AMDGPUAsmPrinter.cpp
R600/SI: cleanup literal handling v3
2013-02-16 11:28:22 +00:00
AMDGPUAsmPrinter.h
…
AMDGPUConvertToISA.cpp
…
AMDGPUFrameLowering.cpp
R600: Support for indirect addressing v4
2013-02-06 17:32:29 +00:00
AMDGPUFrameLowering.h
R600: Support for indirect addressing v4
2013-02-06 17:32:29 +00:00
AMDGPUIndirectAddressing.cpp
R600: Support for indirect addressing v4
2013-02-06 17:32:29 +00:00
AMDGPUInstrInfo.cpp
R600: Support for indirect addressing v4
2013-02-06 17:32:29 +00:00
AMDGPUInstrInfo.h
R600: Support for indirect addressing v4
2013-02-06 17:32:29 +00:00
AMDGPUInstrInfo.td
R600: Support for indirect addressing v4
2013-02-06 17:32:29 +00:00
AMDGPUInstructions.td
R600/SI: Add basic support for more integer vector types.
2013-02-07 17:02:09 +00:00
AMDGPUIntrinsics.td
…
AMDGPUISelLowering.cpp
R600: Support for indirect addressing v4
2013-02-06 17:32:29 +00:00
AMDGPUISelLowering.h
R600/SI: nuke SReg_1 v3
2013-02-16 11:28:30 +00:00
AMDGPUMCInstLower.cpp
Move all of the header files which are involved in modelling the LLVM IR
2013-01-02 11:36:10 +00:00
AMDGPUMCInstLower.h
R600: BB operand support for SI
2012-12-17 15:14:54 +00:00
AMDGPURegisterInfo.cpp
R600: Consolidate sub register indices.
2013-02-07 14:02:37 +00:00
AMDGPURegisterInfo.h
R600: Support for indirect addressing v4
2013-02-06 17:32:29 +00:00
AMDGPURegisterInfo.td
R600: Consolidate sub register indices.
2013-02-07 14:02:37 +00:00
AMDGPUStructurizeCFG.cpp
R600/structurizer: improve inverting conditions
2013-02-16 11:27:50 +00:00
AMDGPUSubtarget.cpp
…
AMDGPUSubtarget.h
Remove redundant 'llvm::' qualifications
2013-01-13 16:01:15 +00:00
AMDGPUTargetMachine.cpp
R600/SI: cleanup literal handling v3
2013-02-16 11:28:22 +00:00
AMDGPUTargetMachine.h
R600: Support for indirect addressing v4
2013-02-06 17:32:29 +00:00
AMDIL7XXDevice.cpp
…
AMDIL7XXDevice.h
…
AMDIL.h
R600: rework handling of the constants
2013-01-23 02:09:06 +00:00
AMDILBase.td
…
AMDILCFGStructurizer.cpp
Resort the #include lines in include/... and lib/... with the
2013-01-02 10:22:59 +00:00
AMDILDevice.cpp
…
AMDILDevice.h
Remove redundant 'llvm::' qualifications
2013-01-13 16:01:15 +00:00
AMDILDeviceInfo.cpp
…
AMDILDeviceInfo.h
…
AMDILDevices.h
…
AMDILEvergreenDevice.cpp
…
AMDILEvergreenDevice.h
Resort the #include lines in include/... and lib/... with the
2013-01-02 10:22:59 +00:00
AMDILInstrInfo.td
R600: New control flow for SI v2
2012-12-19 22:10:31 +00:00
AMDILIntrinsicInfo.cpp
Move all of the header files which are involved in modelling the LLVM IR
2013-01-02 11:36:10 +00:00
AMDILIntrinsicInfo.h
Move all of the header files which are involved in modelling the LLVM IR
2013-01-02 11:36:10 +00:00
AMDILIntrinsics.td
…
AMDILISelDAGToDAG.cpp
R600: Do not fold single instruction with more that 3 kcache read
2013-02-14 16:57:19 +00:00
AMDILISelLowering.cpp
Move all of the header files which are involved in modelling the LLVM IR
2013-01-02 11:36:10 +00:00
AMDILNIDevice.cpp
Resort the #include lines in include/... and lib/... with the
2013-01-02 10:22:59 +00:00
AMDILNIDevice.h
Resort the #include lines in include/... and lib/... with the
2013-01-02 10:22:59 +00:00
AMDILPeepholeOptimizer.cpp
R600/AMDILPeepholeOptimizer.cpp: Tweak std::make_pair to satisfy C++11.
2013-01-29 16:31:56 +00:00
AMDILRegisterInfo.td
…
AMDILSIDevice.cpp
Resort the #include lines in include/... and lib/... with the
2013-01-02 10:22:59 +00:00
AMDILSIDevice.h
…
CMakeLists.txt
R600: Support for indirect addressing v4
2013-02-06 17:32:29 +00:00
LLVMBuild.txt
…
Makefile
…
Processors.td
R600: Add an explicit default processor
2013-02-07 19:39:34 +00:00
R600Defines.h
R600: Support for indirect addressing v4
2013-02-06 17:32:29 +00:00
R600ExpandSpecialInstrs.cpp
R600: improve inputs/interpolation handling
2013-02-05 17:09:14 +00:00
R600InstrInfo.cpp
R600: Support for indirect addressing v4
2013-02-06 17:32:29 +00:00
R600InstrInfo.h
R600: Support for indirect addressing v4
2013-02-06 17:32:29 +00:00
R600Instructions.td
R600: Export instructions are no longer terminator
2013-02-14 16:55:11 +00:00
R600Intrinsics.td
R600: Fold zero/one in export instructions
2013-02-14 16:55:06 +00:00
R600ISelLowering.cpp
R600: Fold zero/one in export instructions
2013-02-14 16:55:06 +00:00
R600ISelLowering.h
R600: Support for indirect addressing v4
2013-02-06 17:32:29 +00:00
R600LowerConstCopy.cpp
R600: Do not fold single instruction with more that 3 kcache read
2013-02-14 16:57:19 +00:00
R600MachineFunctionInfo.cpp
R600: improve inputs/interpolation handling
2013-02-05 17:09:14 +00:00
R600MachineFunctionInfo.h
R600: Support for indirect addressing v4
2013-02-06 17:32:29 +00:00
R600RegisterInfo.cpp
R600: Consolidate sub register indices.
2013-02-07 14:02:37 +00:00
R600RegisterInfo.h
Resort the #include lines in include/... and lib/... with the
2013-01-02 10:22:59 +00:00
R600RegisterInfo.td
R600: Consolidate sub register indices.
2013-02-07 14:02:37 +00:00
R600Schedule.td
…
SIAnnotateControlFlow.cpp
R600/SI: Check for empty stack in SIAnnotateControlFlow::isTopOfStack
2013-02-14 08:00:33 +00:00
SIAssignInterpRegs.cpp
…
SIInsertWaits.cpp
R600: Proper insert S_WAITCNT instructions
2013-01-18 21:15:53 +00:00
SIInstrFormats.td
R600/SI: nuke SReg_1 v3
2013-02-16 11:28:30 +00:00
SIInstrInfo.cpp
R600/SI: cleanup literal handling v3
2013-02-16 11:28:22 +00:00
SIInstrInfo.h
R600/SI: cleanup VGPR encoding
2013-02-07 19:39:45 +00:00
SIInstrInfo.td
R600/SI: nuke SReg_1 v3
2013-02-16 11:28:30 +00:00
SIInstructions.td
R600/SI: nuke SReg_1 v3
2013-02-16 11:28:30 +00:00
SIIntrinsics.td
R600/SI: Make sample intrinsic address parameter type overloaded.
2013-02-07 17:02:13 +00:00
SIISelLowering.cpp
R600/SI: nuke SReg_1 v3
2013-02-16 11:28:30 +00:00
SIISelLowering.h
R600/SI: nuke SReg_1 v3
2013-02-16 11:28:30 +00:00
SILowerControlFlow.cpp
R600/SI: cleanup literal handling v3
2013-02-16 11:28:22 +00:00
SIMachineFunctionInfo.cpp
…
SIMachineFunctionInfo.h
…
SIRegisterInfo.cpp
…
SIRegisterInfo.h
…
SIRegisterInfo.td
R600/SI: nuke SReg_1 v3
2013-02-16 11:28:30 +00:00
SISchedule.td
…