Jakob Stoklund Olesen ebba49395c Pass an explicit operand number to addLiveIns. ...

Not all instructions define a virtual register in their first operand.
Specifically, INLINEASM has a different format.

<rdar://problem/12472811>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165721 91177308-0d34-0410-b5e6-96231b3b80d8

2012-10-11 16:46:07 +00:00

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ARM

Add isel patterns for v2f32 / v4f32 neon.vbsl intrinsics. rdar://12471808

2012-10-10 23:06:34 +00:00

CellSPU

Fix broken tests.

2012-10-02 15:49:34 +00:00

CPP

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Generic

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Hexagon

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MBlaze

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Mips

Implement MipsTargetLowering::CanLowerReturn.

2012-10-10 01:27:09 +00:00

MSP430

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NVPTX

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PowerPC

This patch addresses PR13947.

2012-10-11 15:38:20 +00:00

SPARC

Fix broken tests.

2012-10-02 15:49:34 +00:00

Thumb

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Thumb2

Add LLVM support for Swift.

2012-09-29 21:43:49 +00:00

X86

Pass an explicit operand number to addLiveIns.

2012-10-11 16:46:07 +00:00

XCore

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