Kai Nacke ebf9f0c6cb [MIPS] Add cpu octeon and some instructions
The Octeon cpu from Cavium Networks is mips64r2 based and has an extended
instruction set. In order to utilize this with LLVM, a new cpu feature "octeon"
and a subtarget feature "cnmips" is added. A small set of new instructions
(baddu, dmul, pop, dpop, seq, sne) is also added. LLVM generates dmul, pop and
dpop instructions with option -mcpu=octeon or -mattr=+cnmips.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204337 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-20 11:51:58 +00:00
2014-03-12 22:40:22 +00:00
2014-03-12 22:40:22 +00:00
2014-03-12 22:40:22 +00:00
2014-03-14 04:04:14 +00:00
2014-03-12 22:40:22 +00:00
2014-03-12 22:40:22 +00:00

Low Level Virtual Machine (LLVM)
================================

This directory and its subdirectories contain source code for the Low Level
Virtual Machine, a toolkit for the construction of highly optimized compilers,
optimizers, and runtime environments.

LLVM is open source software. You may freely distribute it under the terms of
the license agreement found in LICENSE.txt.

Please see the documentation provided in docs/ for further
assistance with LLVM, and in particular docs/GettingStarted.rst for getting
started with LLVM and docs/README.txt for an overview of LLVM's
documentation setup.

If you're writing a package for LLVM, see docs/Packaging.rst for our
suggestions.

Description
LLVM backend for 6502
Readme 277 MiB
Languages
C++ 48.7%
LLVM 38.5%
Assembly 10.2%
C 0.9%
Python 0.4%
Other 1.2%