Bill Schmidt d2dcbd00f7 [PowerPC] Change liveness testing in VSX FMA mutation pass ... With VSX enabled, LLVM crashes when compiling test/CodeGen/PowerPC/fma.ll. I traced this to the liveness test that's revised in this patch. The interval test is designed to only work for virtual registers, but in this case the AddendSrcReg is physical. Since there is already a walk of the MIs between the AddendMI and the FMA, I added a check for def/kill of the AddendSrcReg in that loop. At Hal Finkel's request, I converted the liveness test to an assert restricted to virtual registers. I've changed the fma.ll test to have VSX and non-VSX variants so we can test both kinds of multiply-adds. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220090 91177308-0d34-0410-b5e6-96231b3b80d8		2014-10-17 21:02:44 +00:00
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AArch64	[AArch64] Fix a silent codegen fault in BUILD_VECTOR lowering.	2014-10-17 17:06:31 +00:00
ARM	ARM: remove ARM/Thumb distinction for preferred alignment.	2014-10-14 22:12:17 +00:00
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PowerPC	[PowerPC] Change liveness testing in VSX FMA mutation pass	2014-10-17 21:02:44 +00:00
R600	R600/SI: Allow commuting with source modifiers	2014-10-17 18:00:48 +00:00
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SystemZ	IR: add "cmpxchg weak" variant to support permitted failure.	2014-06-13 14:24:07 +00:00
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