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llvm-6502/test/CodeGen/ARM
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Evan Cheng ec52aaa12f Some ARM implementaions, e.g. A-series, does return stack prediction. That is, 
the processor keeps a return addresses stack (RAS) which stores the address
and the instruction execution state of the instruction after a function-call
type branch instruction.

Calling a "noreturn" function with normal call instructions (e.g. bl) can
corrupt RAS and causes 100% return misprediction so LLVM should use a
unconditional branch instead. i.e.
mov lr, pc
b _foo
The "mov lr, pc" is issued in order to get proper backtrace.

rdar://8979299


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151623 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-28 06:42:03 +00:00
..
2006-11-10-CycleInDAG.ll
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2007-01-19-InfiniteLoop.ll
Fix more places which should be checking for iOS, not darwin.
2012-01-04 01:55:04 +00:00
2007-03-07-CombinerCrash.ll
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2007-03-13-InstrSched.ll
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2007-03-21-JoinIntervalsCrash.ll
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2007-03-27-RegScavengerAssert.ll
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2007-03-30-RegScavengerAssert.ll
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2007-04-02-RegScavengerAssert.ll
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2007-04-03-PEIBug.ll
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2007-04-03-UndefinedSymbol.ll
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2007-04-30-CombinerCrash.ll
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2007-05-03-BadPostIndexedLd.ll
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2007-05-07-tailmerge-1.ll
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2007-05-09-tailmerge-2.ll
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2007-05-14-InlineAsmCstCrash.ll
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2007-05-14-RegScavengerAssert.ll
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2007-05-22-tailmerge-3.ll
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2007-05-23-BadPreIndexedStore.ll
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2007-08-15-ReuseBug.ll
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2008-02-04-LocalRegAllocBug.ll
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2008-02-29-RegAllocLocal.ll
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2008-03-05-SxtInRegBug.ll
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2008-03-07-RegScavengerAssert.ll
Upgrade syntax of tests using volatile instructions to use 'load volatile' instead of 'volatile load', which is archaic.
2011-11-27 06:54:59 +00:00
2008-04-04-ScavengerAssert.ll
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2008-04-10-ScavengerAssert.ll
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2008-04-11-PHIofImpDef.ll
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2008-05-19-LiveIntervalsBug.ll
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2008-05-19-ScavengerAssert.ll
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2008-07-17-Fdiv.ll
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2008-07-24-CodeGenPrepCrash.ll
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2008-08-07-AsmPrintBug.ll
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2008-09-17-CoalescerBug.ll
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2008-11-18-ScavengerAssert.ll
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2009-02-16-SpillerBug.ll
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2009-02-22-SoftenFloatVaArg.ll
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2009-02-27-SpillerBug.ll
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2009-03-07-SpillerBug.ll
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2009-03-09-AddrModeBug.ll
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2009-04-06-AsmModifier.ll
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2009-04-08-AggregateAddr.ll
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2009-04-08-FloatUndef.ll
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2009-04-08-FREM.ll
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2009-04-09-RegScavengerAsm.ll
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2009-05-05-DAGCombineBug.ll
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2009-05-07-RegAllocLocal.ll
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2009-05-11-CodePlacementCrash.ll
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2009-05-18-InlineAsmMem.ll
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2009-06-02-ISelCrash.ll
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2009-06-04-MissingLiveIn.ll
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2009-06-15-RegScavengerAssert.ll
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2009-06-19-RegScavengerAssert.ll
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2009-06-22-CoalescerBug.ll
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2009-06-30-RegScavengerAssert2.ll
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2009-06-30-RegScavengerAssert3.ll
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2009-06-30-RegScavengerAssert4.ll
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2009-06-30-RegScavengerAssert5.ll
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2009-06-30-RegScavengerAssert.ll
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2009-07-01-CommuteBug.ll
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2009-07-09-asm-p-constraint.ll
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2009-07-18-RewriterBug.ll
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2009-07-22-ScavengerAssert.ll
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2009-07-22-SchedulerAssert.ll
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2009-07-29-VFP3Registers.ll
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2009-08-02-RegScavengerAssert-Neon.ll
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2009-08-04-RegScavengerAssert-2.ll
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2009-08-04-RegScavengerAssert.ll
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2009-08-15-RegScavenger-EarlyClobber.ll
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2009-08-15-RegScavengerAssert.ll
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2009-08-21-PostRAKill2.ll
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2009-08-21-PostRAKill3.ll
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2009-08-21-PostRAKill.ll
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2009-08-23-linkerprivate.ll
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2009-08-26-ScalarToVector.ll
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2009-08-27-ScalarToVector.ll
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2009-08-29-ExtractEltf32.ll
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2009-08-29-TooLongSplat.ll
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2009-08-31-LSDA-Name.ll
Convert tests to the new EH model.
2011-11-08 00:09:27 +00:00
2009-08-31-TwoRegShuffle.ll
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2009-09-09-AllOnes.ll
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2009-09-09-fpcmp-ole.ll
ARM VLDR/VSTR instructions don't need a size suffix.
2011-11-14 23:03:21 +00:00
2009-09-10-postdec.ll
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2009-09-13-InvalidSubreg.ll
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2009-09-13-InvalidSuperReg.ll
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2009-09-20-LiveIntervalsBug.ll
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2009-09-21-LiveVariablesBug.ll
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2009-09-22-LiveVariablesBug.ll
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2009-09-23-LiveVariablesBug.ll
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2009-09-24-spill-align.ll
ARM VLDR/VSTR instructions don't need a size suffix.
2011-11-14 23:03:21 +00:00
2009-09-27-CoalescerBug.ll
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2009-09-28-LdStOptiBug.ll
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2009-10-02-NEONSubregsBug.ll
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2009-10-16-Scope.ll
Add a new wrapper node for a DILexicalBlock that encapsulates it and a
2011-10-11 22:59:11 +00:00
2009-10-21-InvalidFNeg.ll
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2009-10-27-double-align.ll
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2009-10-30.ll
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2009-11-01-NeonMoves.ll
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2009-11-02-NegativeLane.ll
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2009-11-07-SubRegAsmPrinting.ll
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2009-11-13-CoalescerCrash.ll
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2009-11-13-ScavengerAssert2.ll
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2009-11-13-ScavengerAssert.ll
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2009-11-13-VRRewriterCrash.ll
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2009-11-30-LiveVariablesBug.ll
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2009-12-02-vtrn-undef.ll
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2010-03-04-eabi-fp-spill.ll
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2010-03-04-stm-undef-addr.ll
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2010-03-18-ldm-rtrn.ll
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2010-04-07-DbgValueOtherTargets.ll
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2010-04-09-NeonSelect.ll
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2010-04-13-v2f64SplitArg.ll
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2010-04-14-SplitVector.ll
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2010-04-15-ScavengerDebugValue.ll
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2010-05-14-IllegalType.ll
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2010-05-17-FastAllocCrash.ll
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2010-05-18-LocalAllocCrash.ll
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2010-05-18-PostIndexBug.ll
Tighten physical register invariants: Allocatable physical registers can
2012-02-14 18:51:53 +00:00
2010-05-19-Shuffles.ll
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2010-05-20-NEONSpillCrash.ll
RegAlloc superpass: includes phi elimination, coalescing, and scheduling.
2012-02-10 04:10:36 +00:00
2010-05-21-BuildVector.ll
ARM VLDR/VSTR instructions don't need a size suffix.
2011-11-14 23:03:21 +00:00
2010-06-11-vmovdrr-bitcast.ll
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2010-06-21-LdStMultipleBug.ll
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2010-06-21-nondarwin-tc.ll
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2010-06-25-Thumb2ITInvalidIterator.ll
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2010-06-29-PartialRedefFastAlloc.ll
Set correct <def,undef> flags when lowering REG_SEQUENCE.
2012-01-24 23:28:42 +00:00
2010-06-29-SubregImpDefs.ll
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2010-07-26-GlobalMerge.ll
Convert tests to the new EH model.
2011-11-08 00:09:27 +00:00
2010-08-04-EHCrash.ll
Convert tests to the new EH model.
2011-11-08 00:09:27 +00:00
2010-08-04-StackVariable.ll
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2010-09-21-OptCmpBug.ll
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2010-09-29-mc-asm-header-test.ll
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2010-10-19-mc-elf-objheader.ll
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2010-10-25-ifcvt-ldm.ll
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2010-11-15-SpillEarlyClobber.ll
Delete the 'standard' spiller with used the old spilling framework.
2011-11-12 23:29:02 +00:00
2010-11-29-PrologueBug.ll
ARM target code clean up. Check for iOS, not Darwin where it makes sense.
2011-12-20 18:26:50 +00:00
2010-11-30-reloc-movt.ll
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2010-12-07-PEIBug.ll
Fix more places which should be checking for iOS, not darwin.
2012-01-04 01:55:04 +00:00
2010-12-08-tpsoft.ll
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2010-12-15-elf-lcomm.ll
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2010-12-17-LocalStackSlotCrash.ll
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2011-01-19-MergedGlobalDbg.ll
Make GlobalMerge honor the preferred alignment on globals without an explicitly specified alignment.
2011-11-30 21:54:15 +00:00
2011-02-04-AntidepMultidef.ll
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2011-02-07-AntidepClobber.ll
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2011-03-10-DAGCombineCrash.ll
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2011-03-15-LdStMultipleBug.ll
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2011-03-23-PeepholeBug.ll
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2011-04-07-schediv.ll
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2011-04-11-MachineLICMBug.ll
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2011-04-12-AlignBug.ll
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2011-04-12-FastRegAlloc.ll
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2011-04-15-AndVFlagPeepholeBug.ll
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2011-04-15-RegisterCmpPeephole.ll
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2011-04-26-SchedTweak.ll
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2011-04-27-IfCvtBug.ll
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2011-05-04-MultipleLandingPadSuccs.ll
Convert tests to the new EH model.
2011-11-08 00:09:27 +00:00
2011-06-09-TailCallByVal.ll
PR11004: Inline memcpy to avoid generating nested call sequence. Un-XFAIL 2011-06-09-TailCallByVal and 2010-11-04-BigByval
2011-09-26 06:13:20 +00:00
2011-06-16-TailCallByVal.ll
ARM target code clean up. Check for iOS, not Darwin where it makes sense.
2011-12-20 18:26:50 +00:00
2011-06-29-MergeGlobalsAlign.ll
Make GlobalMerge honor the preferred alignment on globals without an explicitly specified alignment.
2011-11-30 21:54:15 +00:00
2011-07-10-GlobalMergeBug.ll
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2011-08-02-MergedGlobalDbg.ll
Always use the string pool, even when it makes the .o larger. This may help
2011-10-28 05:29:47 +00:00
2011-08-12-vmovqqqq-pseudo.ll
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2011-08-25-ldmia_ret.ll
Fix more places which should be checking for iOS, not darwin.
2012-01-04 01:55:04 +00:00
2011-08-29-ldr_pre_imm.ll
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2011-08-29-SchedCycle.ll
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2011-09-09-OddVectorDivision.ll
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2011-09-19-cpsr.ll
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2011-09-28-CMovCombineBug.ll
Tighten a ARM dag combine condition to avoid an identity transformation, which
2011-09-28 23:16:31 +00:00
2011-10-26-ExpandUnalignedLoadCrash.ll
Don't try to form pre/post-indexed loads/stores until after LegalizeDAG runs. Fixes PR11029.
2011-11-12 00:35:34 +00:00
2011-10-26-memset-inline.ll
Lower mem-ops to unaligned i32/i16 load/stores on ARM where supported.
2011-11-08 18:56:23 +00:00
2011-10-26-memset-with-neon.ll
ARM VLDR/VSTR instructions don't need a size suffix.
2011-11-14 23:03:21 +00:00
2011-11-07-PromoteVectorLoadStore.ll
Make sure to expand SIGN_EXTEND_INREG for NEON vectors. PR11319, round 3.
2011-11-11 03:16:38 +00:00
2011-11-09-BitcastVectorDouble.ll
Add check so we don't try to perform an impossible transformation. Fixes issue from PR11319.
2011-11-09 22:25:12 +00:00
2011-11-09-IllegalVectorFPIntConvert.ll
Make sure we correctly unroll conversions between v2f64 and v2i32 on ARM.
2011-11-09 23:36:02 +00:00
2011-11-14-EarlyClobber.ll
Fix early-clobber handling in shrinkToUses.
2011-11-14 18:45:38 +00:00
2011-11-28-DAGCombineBug.ll
DAG combine should not increase alignment of loads / stores with alignment less
2011-11-28 20:42:56 +00:00
2011-11-29-128bitArithmetics.ll
Make sure DAGCombiner doesn't introduce multiple loads from the same memory location. PR10747, part 2.
2011-12-26 22:49:32 +00:00
2011-11-30-MergeAlignment.ll
Make GlobalMerge honor the preferred alignment on globals without an explicitly specified alignment.
2011-11-30 21:54:15 +00:00
2011-12-14-machine-sink.ll
Do not sink instruction, if it is not profitable.
2011-12-14 23:20:38 +00:00
2011-12-19-sjlj-clobber.ll
Mark ARM eh_sjlj_dispatchsetup as clobbering all registers. Radar 10567930.
2011-12-20 01:29:27 +00:00
2012-01-23-PostRA-LICM.ll
Fix PR11829. PostRA LICM was too aggressive.
2012-01-23 21:01:15 +00:00
2012-01-24-RegSequenceLiveRange.ll
Improve sub-register def handling in ProcessImplicitDefs.
2012-01-25 23:36:27 +00:00
2012-01-26-CoalescerBug.ll
Rewrite instruction operands in AdjustCopiesBackFrom. Fixes PR11861.
2012-01-27 00:05:42 +00:00
2012-01-26-CopyPropKills.ll
Clear kill flags before propagating a copy.
2012-01-26 17:52:15 +00:00
2012-02-01-CoalescerBug.ll
Move test/CodeGen/Generic/2012-02-01-CoalescerBug.ll to CodeGen/ARM, for now. It requires TARGETS=arm.
2012-02-02 11:44:58 +00:00
addrmode.ll
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aliases.ll
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align.ll
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alloca.ll
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argaddr.ll
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arguments2.ll
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arguments3.ll
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arguments4.ll
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arguments5.ll
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arguments6.ll
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arguments7.ll
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arguments8.ll
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arguments_f64_backfill.ll
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arguments-nosplit-double.ll
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arguments-nosplit-i64.ll
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arguments.ll
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arm-and-tst-peephole.ll
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arm-asm.ll
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arm-frameaddr.ll
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arm-modifier.ll
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arm-negative-stride.ll
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arm-returnaddr.ll
Fix more places which should be checking for iOS, not darwin.
2012-01-04 01:55:04 +00:00
armv4.ll
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atomic-64bit.ll
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atomic-cmp.ll
Convert more tests over to the new atomic instructions.
2011-09-26 20:27:49 +00:00
atomic-load-store.ll
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atomic-op.ll
Fix a couple of copy-n-paste bugs. Noticed by George Russell!
2011-12-21 18:56:22 +00:00
available_externally.ll
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avoid-cpsr-rmw.ll
Thumb2 size reduction fix for tied operands of tMUL.
2012-02-24 00:33:36 +00:00
bfc.ll
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bfi.ll
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bfx.ll
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bic.ll
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bits.ll
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bswap-inline-asm.ll
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bx_fold.ll
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call_nolink.ll
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call-noret.ll
Some ARM implementaions, e.g. A-series, does return stack prediction. That is,
2012-02-28 06:42:03 +00:00
call-tc.ll
ARM target code clean up. Check for iOS, not Darwin where it makes sense.
2011-12-20 18:26:50 +00:00
call.ll
Upgrade syntax of tests using volatile instructions to use 'load volatile' instead of 'volatile load', which is archaic.
2011-11-27 06:54:59 +00:00
carry.ll
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clz.ll
Manually upgrade the test suite to specify the flag to cttz and ctlz.
2011-12-12 11:59:10 +00:00
code-placement.ll
Added a late machine instruction copy propagation pass. This catches
2012-01-07 03:02:36 +00:00
compare-call.ll
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constants.ll
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crash-greedy-v6.ll
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crash-greedy.ll
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crash-O0.ll
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crash.ll
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cse-call.ll
Handle regmasks in MachineCSE.
2012-02-28 02:08:50 +00:00
cse-libcalls.ll
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ctor_order.ll
Properly emit ctors / dtors with priorities into desired sections
2012-01-25 22:24:19 +00:00
ctors_dtors.ll
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ctz.ll
Manually upgrade the test suite to specify the flag to cttz and ctlz.
2011-12-12 11:59:10 +00:00
debug-info-arg.ll
Fix more places which should be checking for iOS, not darwin.
2012-01-04 01:55:04 +00:00
debug-info-blocks.ll
ARM target code clean up. Check for iOS, not Darwin where it makes sense.
2011-12-20 18:26:50 +00:00
debug-info-branch-folding.ll
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debug-info-d16-reg.ll
- Add MachineInstrBundle.h and MachineInstrBundle.cpp. This includes a function
2011-12-14 02:11:42 +00:00
debug-info-qreg.ll
Add an option to pad an uleb128 to MCObjectWriter and remove the uleb128 encoding from the DWARF asm printer.
2011-11-05 11:52:44 +00:00
debug-info-s16-reg.ll
Add an option to pad an uleb128 to MCObjectWriter and remove the uleb128 encoding from the DWARF asm printer.
2011-11-05 11:52:44 +00:00
debug-info-sreg2.ll
Make tests less sensitive to scheduling changes.
2012-02-23 17:19:34 +00:00
div.ll
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divmod.ll
Reenable use of divmod compiler_rt functions for iOS 5.0 and later.
2011-10-07 16:59:21 +00:00
dyn-stackalloc.ll
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eh-resume-darwin.ll
Convert tests to the new EH model.
2011-11-08 00:09:27 +00:00
ehabi-unwind.ll
An option to selectively enable part of ARM EHABI support.
2012-01-24 13:05:33 +00:00
elf-lcomm-align.ll
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extloadi1.ll
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fabss.ll
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fadds.ll
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fast-isel-binary.ll
[fast-isel] Add support for SUBs with non-legal types.
2012-02-08 02:45:44 +00:00
fast-isel-br-const.ll
ARM target code clean up. Check for iOS, not Darwin where it makes sense.
2011-12-20 18:26:50 +00:00
fast-isel-br-phi.ll
[fast-isel] HandlePHINodesInSuccessorBlocks() can promite i8 and i16 types too.
2012-02-04 00:39:19 +00:00
fast-isel-call.ll
ARM target code clean up. Check for iOS, not Darwin where it makes sense.
2011-12-20 18:26:50 +00:00
fast-isel-cmp-imm.ll
ARM target code clean up. Check for iOS, not Darwin where it makes sense.
2011-12-20 18:26:50 +00:00
fast-isel-conversion.ll
[fast-isel] Add support for FPToUI. Also add test cases for FPToSI.
2012-02-03 20:27:51 +00:00
fast-isel-crash2.ll
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fast-isel-crash.ll
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fast-isel-deadcode.ll
Reapply r146997, "Heed spill slot alignment on ARM."
2012-01-05 00:26:57 +00:00
fast-isel-fold.ll
Add support for emitting both signed- and zero-extend loads. Fix
2011-11-13 02:23:59 +00:00
fast-isel-GEP-coalesce.ll
When fast iseling a GEP, accumulate the offset rather than emitting a series of
2011-11-17 07:15:58 +00:00
fast-isel-icmp.ll
ARM target code clean up. Check for iOS, not Darwin where it makes sense.
2011-12-20 18:26:50 +00:00
fast-isel-indirectbr.ll
[fast-isel] Add support for indirect branches.
2012-02-07 23:56:08 +00:00
fast-isel-intrinsic.ll
Use getRegForValue() to materialize the address of ARM globals.
2012-01-07 04:07:22 +00:00
fast-isel-ldr-str-arm.ll
Add newline to end of file. Thanks, Eli.
2011-11-14 22:48:33 +00:00
fast-isel-ldr-str-thumb-neg-index.ll
ARM target code clean up. Check for iOS, not Darwin where it makes sense.
2011-12-20 18:26:50 +00:00
fast-isel-ldrh-strh-arm.ll
ARM target code clean up. Check for iOS, not Darwin where it makes sense.
2011-12-20 18:26:50 +00:00
fast-isel-mvn.ll
ARM target code clean up. Check for iOS, not Darwin where it makes sense.
2011-12-20 18:26:50 +00:00
fast-isel-pred.ll
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fast-isel-redefinition.ll
RegAlloc superpass: includes phi elimination, coalescing, and scheduling.
2012-02-10 04:10:36 +00:00
fast-isel-ret.ll
[fast-isel] Add support for returning non-legal types with no sign- or zero-
2012-02-17 01:21:28 +00:00
fast-isel-select.ll
ARM target code clean up. Check for iOS, not Darwin where it makes sense.
2011-12-20 18:26:50 +00:00
fast-isel-static.ll
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fast-isel.ll
Use getRegForValue() to materialize the address of ARM globals.
2012-01-07 04:07:22 +00:00
fcopysign.ll
Make tests less sensitive to scheduling changes.
2012-02-23 17:19:34 +00:00
fdivs.ll
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fixunsdfdi.ll
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flag-crash.ll
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fmacs.ll
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fmdrr-fmrrd.ll
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fmscs.ll
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fmuls.ll
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fnegs.ll
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fnmacs.ll
…
fnmscs.ll
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fnmul.ll
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fnmuls.ll
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fold-const.ll
Manually upgrade the test suite to specify the flag to cttz and ctlz.
2011-12-12 11:59:10 +00:00
formal.ll
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fp16.ll
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fp_convert.ll
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fp-arg-shuffle.ll
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fp.ll
ARM VLDR/VSTR instructions don't need a size suffix.
2011-11-14 23:03:21 +00:00
fparith.ll
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fpcmp_ueq.ll
…
fpcmp-opt.ll
ARM VLDR/VSTR instructions don't need a size suffix.
2011-11-14 23:03:21 +00:00
fpcmp.ll
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fpconsts.ll
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fpconv.ll
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fpmem.ll
ARM VLDR/VSTR instructions don't need a size suffix.
2011-11-14 23:03:21 +00:00
fpow.ll
…
fpowi.ll
…
fptoint.ll
…
fsubs.ll
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fusedMAC.ll
Add fused multiple+add instructions from VFPv4.
2012-01-22 12:07:33 +00:00
global-merge.ll
Make GlobalMerge honor the preferred alignment on globals without an explicitly specified alignment.
2011-11-30 21:54:15 +00:00
globals.ll
Align ARM constant pool islands via their basic block.
2011-12-06 01:43:02 +00:00
gv-stubs-crash.ll
Check the visibility of the global variable before placing it into the stubs
2011-10-24 23:05:43 +00:00
hardfloat_neon.ll
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hello.ll
Fix more places which should be checking for iOS, not darwin.
2012-01-04 01:55:04 +00:00
hidden-vis-2.ll
ARM Darwin default relocation model is PIC.
2011-09-30 17:41:35 +00:00
hidden-vis-3.ll
ARM Darwin default relocation model is PIC.
2011-09-30 17:41:35 +00:00
hidden-vis.ll
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iabs.ll
Reapply r141365 now that PR11107 is fixed.
2011-10-10 22:59:55 +00:00
ifcvt1.ll
Move tests to FileCheck.
2011-12-19 23:26:44 +00:00
ifcvt2.ll
…
ifcvt3.ll
Move tests to FileCheck.
2011-12-19 23:26:44 +00:00
ifcvt4.ll
…
ifcvt5.ll
Fix more places which should be checking for iOS, not darwin.
2012-01-04 01:55:04 +00:00
ifcvt6.ll
Fix more places which should be checking for iOS, not darwin.
2012-01-04 01:55:04 +00:00
ifcvt7.ll
…
ifcvt8.ll
…
ifcvt9.ll
…
ifcvt10.ll
Fix more places which should be checking for iOS, not darwin.
2012-01-04 01:55:04 +00:00
ifcvt11.ll
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illegal-vector-bitcast.ll
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imm.ll
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indirectbr.ll
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inlineasm2.ll
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inlineasm3.ll
Implement 'e' and 'f' modifiers for Neon inline asm. <rdar://problem/10551006>
2011-12-12 21:45:15 +00:00
inlineasm4.ll
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inlineasm-imm-arm.ll
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inlineasm.ll
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insn-sched1.ll
Fix more places which should be checking for iOS, not darwin.
2012-01-04 01:55:04 +00:00
int-to-fp.ll
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intrinsics.ll
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ispositive.ll
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jumptable-label.ll
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large-stack.ll
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ldm.ll
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ldr_ext.ll
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ldr_frame.ll
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ldr_post.ll
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ldr_pre.ll
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ldr.ll
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ldrd-memoper.ll
Preserve MachineMemOperands in ARMLoadStoreOptimizer.
2011-11-11 22:18:09 +00:00
ldrd.ll
ARM Ld/St Optimizer fix.
2012-01-11 03:56:08 +00:00
ldst-f32-2-i32.ll
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ldstrexd.ll
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lit.local.cfg
Replace all instances of dg.exp file with lit.local.cfg, since all tests are run with LIT now and now Dejagnu. dg.exp is no longer needed.
2012-02-16 06:28:33 +00:00
load_i1_select.ll
When emitting a cmp with 0 for a lowered select, mask out the high
2012-02-24 00:09:36 +00:00
load-global.ll
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load.ll
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long_shift.ll
- Add MachineInstrBundle.h and MachineInstrBundle.cpp. This includes a function
2011-12-14 02:11:42 +00:00
long-setcc.ll
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long.ll
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lsr-code-insertion.ll
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lsr-on-unrolled-loops.ll
ARM VLDR/VSTR instructions don't need a size suffix.
2011-11-14 23:03:21 +00:00
lsr-scale-addr-mode.ll
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lsr-unfolded-offset.ll
Fix more places which should be checking for iOS, not darwin.
2012-01-04 01:55:04 +00:00
machine-cse-cmp.ll
Allow machine-cse to look across MBB boundary when cse'ing instructions that
2012-01-10 02:02:58 +00:00
machine-licm.ll
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mem.ll
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memcpy-inline.ll
Delete stale comment.
2011-11-14 18:03:05 +00:00
memfunc.ll
Proper support for a bastardized darwin-eabi hybird ABI.
2012-02-21 20:46:00 +00:00
mls.ll
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movt-movw-global.ll
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movt.ll
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mul_const.ll
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mul.ll
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mulhi.ll
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mult-alt-generic-arm.ll
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mvn.ll
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neon_arith1.ll
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neon_div.ll
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neon_ld1.ll
FileCheckize.
2011-11-29 23:09:16 +00:00
neon_ld2.ll
FileCheckize.
2011-11-29 23:09:16 +00:00
neon_minmax.ll
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neon_shift.ll
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odr_comdat.ll
test commit. removing unnecessary whitespace.
2012-02-24 13:52:45 +00:00
pack.ll
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peephole-bitcast.ll
XFAIL test that depends on linear scan to remove dead code.
2011-11-12 22:39:30 +00:00
phi.ll
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pr3502.ll
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prefetch.ll
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private.ll
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reg_sequence.ll
ARM VLDR/VSTR instructions don't need a size suffix.
2011-11-14 23:03:21 +00:00
ret0.ll
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ret_arg1.ll
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ret_arg2.ll
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ret_arg3.ll
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ret_arg4.ll
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ret_arg5.ll
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ret_f32_arg2.ll
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ret_f32_arg5.ll
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ret_f64_arg2.ll
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ret_f64_arg_reg_split.ll
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ret_f64_arg_split.ll
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ret_f64_arg_stack.ll
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ret_i64_arg2.ll
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ret_i64_arg3.ll
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ret_i64_arg_split.ll
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ret_i128_arg2.ll
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ret_void.ll
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rev.ll
Canonicalize (srl (bswap x), 16) to (rotr (bswap x), 16) if the high 16 bits
2012-02-23 02:58:19 +00:00
sbfx.ll
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section.ll
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select_xform.ll
Optimize a couple of common patterns involving conditional moves where the false
2012-02-23 01:19:06 +00:00
select-imm.ll
Thumb2 remove redundant ".w" suffix from t2MVNCCi pattern.
2011-10-26 17:28:15 +00:00
select.ll
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shifter_operand.ll
DAGCombine's logic for forming pre- and post- indexed loads / stores were being
2012-01-13 01:37:24 +00:00
shuffle.ll
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smul.ll
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spill-q.ll
Enable aligned NEON spilling by default.
2012-01-06 22:19:37 +00:00
stack-frame.ll
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stm.ll
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str_post.ll
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str_pre-2.ll
Linear scan is going away.
2011-11-12 22:39:34 +00:00
str_pre.ll
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str_trunc.ll
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sub.ll
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subreg-remat.ll
ARM VLDR/VSTR instructions don't need a size suffix.
2011-11-14 23:03:21 +00:00
sxt_rot.ll
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t2-imm.ll
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tail-dup.ll
Replace the use of isPredicable() with isPredicated() in
2012-01-26 18:24:25 +00:00
tail-opts.ll
ARM Darwin default relocation model is PIC.
2011-09-30 17:41:35 +00:00
test-sharedidx.ll
test/CodeGen/ARM/test-sharedidx.ll: Fix for -Asserts.
2012-01-13 07:03:55 +00:00
thread_pointer.ll
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thumb1-varalloc.ll
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thumb2-it-block.ll
Test simplification that Ana Pazos noticed.
2011-10-11 04:43:15 +00:00
tls1.ll
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tls2.ll
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tls3.ll
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trap.ll
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trunc_ldr.ll
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truncstore-dag-combine.ll
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tst_teq.ll
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uint64tof64.ll
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umulo-32.ll
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unaligned_load_store.ll
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undef-sext.ll
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unord.ll
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uxt_rot.ll
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uxtb.ll
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va_arg.ll
Make this test less sensitive to codegen optimizations.
2011-10-05 18:13:08 +00:00
vaba.ll
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vabd.ll
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vabs.ll
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vadd.ll
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vargs_align.ll
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vargs.ll
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vbits.ll
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vbsl-constant.ll
ARM VLDR/VSTR instructions don't need a size suffix.
2011-11-14 23:03:21 +00:00
vbsl.ll
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vceq.ll
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vcge.ll
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vcgt.ll
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vcnt.ll
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vcombine.ll
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vcvt_combine.ll
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vcvt.ll
…
vdiv_combine.ll
…
vdup.ll
ARM VLDR/VSTR instructions don't need a size suffix.
2011-11-14 23:03:21 +00:00
vector-DAGCombine.ll
ARM VLDR/VSTR instructions don't need a size suffix.
2011-11-14 23:03:21 +00:00
vext.ll
ARM VLDR/VSTR instructions don't need a size suffix.
2011-11-14 23:03:21 +00:00
vfcmp.ll
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vfp.ll
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vget_lane.ll
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vhadd.ll
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vhsub.ll
…
vicmp.ll
…
vld1.ll
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vld2.ll
…
vld3.ll
…
vld4.ll
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vlddup.ll
Also set addrmode6 alignment when align==size.
2011-10-27 22:39:16 +00:00
vldlane.ll
Also set addrmode6 alignment when align==size.
2011-10-27 22:39:16 +00:00
vminmax.ll
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vmla.ll
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vmls.ll
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vmov.ll
ARM vector any_extends need to be selected to vmovl. <rdar://problem/10723651>
2012-01-20 20:59:56 +00:00
vmul.ll
Fix incorrect check for sign-extended constant BUILD_VECTOR.
2011-10-18 17:34:51 +00:00
vneg.ll
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vpadal.ll
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vpadd.ll
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vpminmax.ll
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vqadd.ll
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vqdmul.ll
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vqshl.ll
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vqshrn.ll
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vqsub.ll
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vrec.ll
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vrev.ll
Add CHECKs and document PR11158.
2011-10-17 20:23:23 +00:00
vshift.ll
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vshiftins.ll
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vshl.ll
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vshll.ll
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vshrn.ll
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vsra.ll
…
vst1.ll
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vst2.ll
VST2 four-register w/ update pseudos for fixed/register update.
2012-01-20 19:16:00 +00:00
vst3.ll
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vst4.ll
…
vstlane.ll
Also set addrmode6 alignment when align==size.
2011-10-27 22:39:16 +00:00
vsub.ll
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vtbl.ll
…
vtrn.ll
…
vuzp.ll
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vzip.ll
…
weak2.ll
…
weak.ll
…
widen-vmovs.ll
ARM VLDR/VSTR instructions don't need a size suffix.
2011-11-14 23:03:21 +00:00