Eric Christopher 9a9d275dc7 Custom lower the memory barrier instructions and add support ...

for lowering without sse2.  Add a couple of new testcases.

Fixes a few libgomp tests and latent bugs.  Remove a few todos.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109078 91177308-0d34-0410-b5e6-96231b3b80d8

2010-07-22 02:48:34 +00:00

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Alpha

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ARM

More register pressure aware scheduling work.

2010-07-21 23:53:58 +00:00

Blackfin

Remove TargetInstrInfo::copyRegToReg entirely.

2010-07-11 17:01:17 +00:00

CBackend

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CellSPU

Remove many calls to TII::isMoveInstr. Targets should be producing COPY anyway.

2010-07-16 04:45:42 +00:00

CPP

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Generic

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MBlaze

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Mips

Fix PR7174, a couple o Mips fixes:

2010-07-20 08:37:04 +00:00

MSP430

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PIC16

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PowerPC

Consider this function:

2010-07-16 22:51:10 +00:00

SPARC

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SystemZ

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Thumb

Feed the right output into FileCheck.

2010-07-16 10:58:02 +00:00

Thumb2

update tests for smarter BIC usage

2010-07-20 16:16:48 +00:00

X86

Custom lower the memory barrier instructions and add support

2010-07-22 02:48:34 +00:00

XCore

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