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	Refactored parts of the hardware loop pass to generate more. Also, added more tests. Differential Revision: http://reviews.llvm.org/D9568 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236896 91177308-0d34-0410-b5e6-96231b3b80d8
		
			
				
	
	
		
			38 lines
		
	
	
		
			1.1 KiB
		
	
	
	
		
			LLVM
		
	
	
	
	
	
			
		
		
	
	
			38 lines
		
	
	
		
			1.1 KiB
		
	
	
	
		
			LLVM
		
	
	
	
	
	
; RUN: llc -disable-lsr -march=hexagon < %s | FileCheck %s
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; Test for multiple phis with induction variables.
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; CHECK: loop0(.LBB{{.}}_{{.}}, r{{[0-9]+}})
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; CHECK: endloop0
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define i32 @hwloop4(i32* nocapture %s, i32* nocapture %a, i32 %n) {
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entry:
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  %cmp3 = icmp eq i32 %n, 0
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  br i1 %cmp3, label %for.end, label %for.body.lr.ph
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for.body.lr.ph:
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  %.pre = load i32, i32* %s, align 4
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  br label %for.body
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for.body:
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  %0 = phi i32 [ %.pre, %for.body.lr.ph ], [ %add1, %for.body ]
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  %j.05 = phi i32 [ 0, %for.body.lr.ph ], [ %add2, %for.body ]
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  %lsr.iv = phi i32 [ %lsr.iv.next, %for.body ], [ %n, %for.body.lr.ph ]
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  %lsr.iv1 = phi i32* [ %scevgep, %for.body ], [ %a, %for.body.lr.ph ]
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  %1 = load i32, i32* %lsr.iv1, align 4
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  %add1 = add nsw i32 %0, %1
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  store i32 %add1, i32* %s, align 4
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  %add2 = add nsw i32 %j.05, 1
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  %lsr.iv.next = add i32 %lsr.iv, -1
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  %scevgep = getelementptr i32, i32* %lsr.iv1, i32 1
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  %cmp = icmp eq i32 %lsr.iv.next, 0
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  br i1 %cmp, label %for.end.loopexit, label %for.body
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for.end.loopexit:
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  br label %for.end
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for.end:
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  %j.0.lcssa = phi i32 [ 0, %entry ], [ %add2, %for.end.loopexit ]
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  ret i32 %j.0.lcssa
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}
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