mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-11-04 05:17:07 +00:00
7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
37 lines
990 B
LLVM
37 lines
990 B
LLVM
; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s -O0
|
|
|
|
; This is a regression test which makes sure that the offset check
|
|
; is available for STRiw_indexed instruction. This is required
|
|
; by 'Hexagon Expand Predicate Spill Code' pass.
|
|
|
|
define i32 @f(i32 %a, i32 %b) nounwind {
|
|
entry:
|
|
%retval = alloca i32, align 4
|
|
%a.addr = alloca i32, align 4
|
|
%b.addr = alloca i32, align 4
|
|
store i32 %a, i32* %a.addr, align 4
|
|
store i32 %b, i32* %b.addr, align 4
|
|
%0 = load i32, i32* %a.addr, align 4
|
|
%1 = load i32, i32* %b.addr, align 4
|
|
%cmp = icmp sgt i32 %0, %1
|
|
br i1 %cmp, label %if.then, label %if.else
|
|
|
|
if.then:
|
|
%2 = load i32, i32* %a.addr, align 4
|
|
%3 = load i32, i32* %b.addr, align 4
|
|
%add = add nsw i32 %2, %3
|
|
store i32 %add, i32* %retval
|
|
br label %return
|
|
|
|
if.else:
|
|
%4 = load i32, i32* %a.addr, align 4
|
|
%5 = load i32, i32* %b.addr, align 4
|
|
%sub = sub nsw i32 %4, %5
|
|
store i32 %sub, i32* %retval
|
|
br label %return
|
|
|
|
return:
|
|
%6 = load i32, i32* %retval
|
|
ret i32 %6
|
|
}
|