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ed5546e50bcd5a8263f16db34c5a58aa55b5eb3a
llvm-6502/test/MC/Disassembler
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Zoran Jovanovic 627c5342b2 [mips][microMIPS] Implement SLL and NOP instructions
http://reviews.llvm.org/D10474


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241150 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-01 09:54:51 +00:00
..
AArch64
ARM]: Add support for MMFR4_EL1 in assembler
2015-06-08 15:01:11 +00:00
ARM
[ARM] Add v8.1a "Privileged Access Never" extension
2015-04-16 11:34:25 +00:00
Hexagon
[Hexagon] Adding decoders for signed operands and ensuring all signed operand types disassemble correctly.
2015-06-10 16:52:32 +00:00
Mips
[mips][microMIPS] Implement SLL and NOP instructions
2015-07-01 09:54:51 +00:00
PowerPC
[PPC] Implement vmrgew and vmrgow instructions
2015-06-25 15:17:40 +00:00
Sparc
Sparc: Support PSR, TBR, WIM read/write instructions.
2015-05-18 16:38:47 +00:00
SystemZ
[SystemZ] Add z13 vector facility and MC support
2015-05-05 19:23:40 +00:00
X86
[X86]: Correctly sign-extend 16-bit immediate in CALL instruction.
2015-06-26 16:58:59 +00:00
XCore
Reduce verbiage of lit.local.cfg files
2014-06-09 22:42:55 +00:00
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