Tim Northover ee06f15a0e ARM: constrain register-class in fast-isel ... The tests were no longer using fast-isel at all (MachO needs an "ios" rather than "darwin" triple at the moment and Linux needs ARM mode). Once that was corrected, the verifier complained about a t2ADDri created for the alloca. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197046 91177308-0d34-0410-b5e6-96231b3b80d8		2013-12-11 16:04:57 +00:00
..
Analysis	Don't #include heavy Dominators.h file in LoopInfo.h. This change reduces	2013-12-07 21:20:17 +00:00
AsmParser
Bitcode	Remove unused value.	2013-12-07 02:27:52 +00:00
CodeGen	Extend (truncate (load)) folding	2013-12-11 11:37:27 +00:00
DebugInfo
ExecutionEngine	Prune redundant dependencies in LLVMBuild.txt.	2013-12-11 00:30:57 +00:00
IR	GCOV.cpp: Use PRIu64 instead of %lu.	2013-12-10 05:39:40 +00:00
IRReader
Linker
LTO	Prune redundant dependencies in LLVMBuild.txt.	2013-12-11 00:30:57 +00:00
MC	Prune redundant dependencies in LLVMBuild.txt.	2013-12-11 00:30:57 +00:00
Object	Fix a pair of array index checks.	2013-12-06 02:33:38 +00:00
Option
Support	Build fix for Android NDK which has neither futimes nor futimens	2013-12-11 15:42:33 +00:00
TableGen
Target	ARM: constrain register-class in fast-isel	2013-12-11 16:04:57 +00:00
Transforms	Prune redundant dependencies in LLVMBuild.txt.	2013-12-11 00:30:57 +00:00
CMakeLists.txt
LLVMBuild.txt
Makefile