llvm-6502/mips64ext.ll at ee973147ac0aad6471f5506c3278654baec4d1c0 - llvm-6502 - Applefritter: Git

6502/llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-02-12 03:32:10 +00:00

Akira Hatanaka ee973147ac Remove definitions of double word shift plus 32 instructions. Assembler or

direct-object emitter should emit the appropriate shift instruction depending
on the shift amount.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146893 91177308-0d34-0410-b5e6-96231b3b80d8

2011-12-19 19:44:09 +00:00

12 lines

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 ; RUN: llc  < %s -march=mips64el -mcpu=mips64 -mattr=n64 | FileCheck %s
 define i64 @zext64_32(i32 %a) nounwind readnone {
 entry:
 ; CHECK: addiu $[[R0:[0-9]+]], ${{[0-9]+}}, 2
 ; CHECK: dsll $[[R1:[0-9]+]], $[[R0]], 32
 ; CHECK: dsrl ${{[0-9]+}}, $[[R1]], 32
   %add = add i32 %a, 2
   %conv = zext i32 %add to i64
   ret i64 %conv
 }