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			357 lines
		
	
	
		
			13 KiB
		
	
	
	
		
			C++
		
	
	
	
	
	
			
		
		
	
	
			357 lines
		
	
	
		
			13 KiB
		
	
	
	
		
			C++
		
	
	
	
	
	
| //===- MachineSSAUpdater.cpp - Unstructured SSA Update Tool ---------------===//
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| //
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| //                     The LLVM Compiler Infrastructure
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| //
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| // This file is distributed under the University of Illinois Open Source
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| // License. See LICENSE.TXT for details.
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| //
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| //===----------------------------------------------------------------------===//
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| //
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| // This file implements the MachineSSAUpdater class. It's based on SSAUpdater
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| // class in lib/Transforms/Utils.
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| //
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| //===----------------------------------------------------------------------===//
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| 
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| #include "llvm/CodeGen/MachineSSAUpdater.h"
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| #include "llvm/ADT/DenseMap.h"
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| #include "llvm/ADT/SmallVector.h"
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| #include "llvm/CodeGen/MachineInstr.h"
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| #include "llvm/CodeGen/MachineInstrBuilder.h"
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| #include "llvm/CodeGen/MachineRegisterInfo.h"
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| #include "llvm/Support/AlignOf.h"
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| #include "llvm/Support/Allocator.h"
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| #include "llvm/Support/Debug.h"
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| #include "llvm/Support/ErrorHandling.h"
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| #include "llvm/Support/raw_ostream.h"
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| #include "llvm/Target/TargetInstrInfo.h"
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| #include "llvm/Target/TargetRegisterInfo.h"
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| #include "llvm/Target/TargetSubtargetInfo.h"
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| #include "llvm/Transforms/Utils/SSAUpdaterImpl.h"
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| using namespace llvm;
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| 
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| #define DEBUG_TYPE "machine-ssaupdater"
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| 
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| typedef DenseMap<MachineBasicBlock*, unsigned> AvailableValsTy;
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| static AvailableValsTy &getAvailableVals(void *AV) {
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|   return *static_cast<AvailableValsTy*>(AV);
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| }
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| 
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| MachineSSAUpdater::MachineSSAUpdater(MachineFunction &MF,
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|                                      SmallVectorImpl<MachineInstr*> *NewPHI)
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|   : AV(nullptr), InsertedPHIs(NewPHI) {
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|   TII = MF.getSubtarget().getInstrInfo();
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|   MRI = &MF.getRegInfo();
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| }
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| 
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| MachineSSAUpdater::~MachineSSAUpdater() {
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|   delete static_cast<AvailableValsTy*>(AV);
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| }
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| 
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| /// Initialize - Reset this object to get ready for a new set of SSA
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| /// updates.  ProtoValue is the value used to name PHI nodes.
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| void MachineSSAUpdater::Initialize(unsigned V) {
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|   if (!AV)
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|     AV = new AvailableValsTy();
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|   else
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|     getAvailableVals(AV).clear();
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| 
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|   VR = V;
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|   VRC = MRI->getRegClass(VR);
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| }
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| 
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| /// HasValueForBlock - Return true if the MachineSSAUpdater already has a value for
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| /// the specified block.
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| bool MachineSSAUpdater::HasValueForBlock(MachineBasicBlock *BB) const {
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|   return getAvailableVals(AV).count(BB);
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| }
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| 
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| /// AddAvailableValue - Indicate that a rewritten value is available in the
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| /// specified block with the specified value.
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| void MachineSSAUpdater::AddAvailableValue(MachineBasicBlock *BB, unsigned V) {
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|   getAvailableVals(AV)[BB] = V;
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| }
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| 
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| /// GetValueAtEndOfBlock - Construct SSA form, materializing a value that is
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| /// live at the end of the specified block.
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| unsigned MachineSSAUpdater::GetValueAtEndOfBlock(MachineBasicBlock *BB) {
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|   return GetValueAtEndOfBlockInternal(BB);
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| }
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| 
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| static
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| unsigned LookForIdenticalPHI(MachineBasicBlock *BB,
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|         SmallVectorImpl<std::pair<MachineBasicBlock*, unsigned> > &PredValues) {
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|   if (BB->empty())
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|     return 0;
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| 
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|   MachineBasicBlock::iterator I = BB->begin();
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|   if (!I->isPHI())
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|     return 0;
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| 
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|   AvailableValsTy AVals;
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|   for (unsigned i = 0, e = PredValues.size(); i != e; ++i)
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|     AVals[PredValues[i].first] = PredValues[i].second;
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|   while (I != BB->end() && I->isPHI()) {
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|     bool Same = true;
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|     for (unsigned i = 1, e = I->getNumOperands(); i != e; i += 2) {
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|       unsigned SrcReg = I->getOperand(i).getReg();
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|       MachineBasicBlock *SrcBB = I->getOperand(i+1).getMBB();
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|       if (AVals[SrcBB] != SrcReg) {
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|         Same = false;
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|         break;
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|       }
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|     }
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|     if (Same)
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|       return I->getOperand(0).getReg();
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|     ++I;
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|   }
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|   return 0;
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| }
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| 
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| /// InsertNewDef - Insert an empty PHI or IMPLICIT_DEF instruction which define
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| /// a value of the given register class at the start of the specified basic
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| /// block. It returns the virtual register defined by the instruction.
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| static
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| MachineInstrBuilder InsertNewDef(unsigned Opcode,
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|                            MachineBasicBlock *BB, MachineBasicBlock::iterator I,
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|                            const TargetRegisterClass *RC,
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|                            MachineRegisterInfo *MRI,
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|                            const TargetInstrInfo *TII) {
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|   unsigned NewVR = MRI->createVirtualRegister(RC);
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|   return BuildMI(*BB, I, DebugLoc(), TII->get(Opcode), NewVR);
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| }
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| 
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| /// GetValueInMiddleOfBlock - Construct SSA form, materializing a value that
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| /// is live in the middle of the specified block.
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| ///
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| /// GetValueInMiddleOfBlock is the same as GetValueAtEndOfBlock except in one
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| /// important case: if there is a definition of the rewritten value after the
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| /// 'use' in BB.  Consider code like this:
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| ///
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| ///      X1 = ...
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| ///   SomeBB:
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| ///      use(X)
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| ///      X2 = ...
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| ///      br Cond, SomeBB, OutBB
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| ///
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| /// In this case, there are two values (X1 and X2) added to the AvailableVals
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| /// set by the client of the rewriter, and those values are both live out of
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| /// their respective blocks.  However, the use of X happens in the *middle* of
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| /// a block.  Because of this, we need to insert a new PHI node in SomeBB to
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| /// merge the appropriate values, and this value isn't live out of the block.
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| ///
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| unsigned MachineSSAUpdater::GetValueInMiddleOfBlock(MachineBasicBlock *BB) {
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|   // If there is no definition of the renamed variable in this block, just use
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|   // GetValueAtEndOfBlock to do our work.
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|   if (!HasValueForBlock(BB))
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|     return GetValueAtEndOfBlockInternal(BB);
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| 
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|   // If there are no predecessors, just return undef.
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|   if (BB->pred_empty()) {
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|     // Insert an implicit_def to represent an undef value.
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|     MachineInstr *NewDef = InsertNewDef(TargetOpcode::IMPLICIT_DEF,
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|                                         BB, BB->getFirstTerminator(),
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|                                         VRC, MRI, TII);
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|     return NewDef->getOperand(0).getReg();
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|   }
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| 
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|   // Otherwise, we have the hard case.  Get the live-in values for each
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|   // predecessor.
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|   SmallVector<std::pair<MachineBasicBlock*, unsigned>, 8> PredValues;
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|   unsigned SingularValue = 0;
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| 
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|   bool isFirstPred = true;
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|   for (MachineBasicBlock::pred_iterator PI = BB->pred_begin(),
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|          E = BB->pred_end(); PI != E; ++PI) {
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|     MachineBasicBlock *PredBB = *PI;
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|     unsigned PredVal = GetValueAtEndOfBlockInternal(PredBB);
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|     PredValues.push_back(std::make_pair(PredBB, PredVal));
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| 
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|     // Compute SingularValue.
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|     if (isFirstPred) {
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|       SingularValue = PredVal;
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|       isFirstPred = false;
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|     } else if (PredVal != SingularValue)
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|       SingularValue = 0;
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|   }
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| 
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|   // Otherwise, if all the merged values are the same, just use it.
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|   if (SingularValue != 0)
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|     return SingularValue;
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| 
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|   // If an identical PHI is already in BB, just reuse it.
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|   unsigned DupPHI = LookForIdenticalPHI(BB, PredValues);
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|   if (DupPHI)
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|     return DupPHI;
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| 
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|   // Otherwise, we do need a PHI: insert one now.
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|   MachineBasicBlock::iterator Loc = BB->empty() ? BB->end() : BB->begin();
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|   MachineInstrBuilder InsertedPHI = InsertNewDef(TargetOpcode::PHI, BB,
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|                                                  Loc, VRC, MRI, TII);
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| 
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|   // Fill in all the predecessors of the PHI.
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|   for (unsigned i = 0, e = PredValues.size(); i != e; ++i)
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|     InsertedPHI.addReg(PredValues[i].second).addMBB(PredValues[i].first);
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| 
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|   // See if the PHI node can be merged to a single value.  This can happen in
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|   // loop cases when we get a PHI of itself and one other value.
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|   if (unsigned ConstVal = InsertedPHI->isConstantValuePHI()) {
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|     InsertedPHI->eraseFromParent();
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|     return ConstVal;
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|   }
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| 
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|   // If the client wants to know about all new instructions, tell it.
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|   if (InsertedPHIs) InsertedPHIs->push_back(InsertedPHI);
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| 
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|   DEBUG(dbgs() << "  Inserted PHI: " << *InsertedPHI << "\n");
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|   return InsertedPHI->getOperand(0).getReg();
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| }
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| 
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| static
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| MachineBasicBlock *findCorrespondingPred(const MachineInstr *MI,
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|                                          MachineOperand *U) {
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|   for (unsigned i = 1, e = MI->getNumOperands(); i != e; i += 2) {
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|     if (&MI->getOperand(i) == U)
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|       return MI->getOperand(i+1).getMBB();
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|   }
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| 
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|   llvm_unreachable("MachineOperand::getParent() failure?");
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| }
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| 
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| /// RewriteUse - Rewrite a use of the symbolic value.  This handles PHI nodes,
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| /// which use their value in the corresponding predecessor.
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| void MachineSSAUpdater::RewriteUse(MachineOperand &U) {
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|   MachineInstr *UseMI = U.getParent();
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|   unsigned NewVR = 0;
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|   if (UseMI->isPHI()) {
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|     MachineBasicBlock *SourceBB = findCorrespondingPred(UseMI, &U);
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|     NewVR = GetValueAtEndOfBlockInternal(SourceBB);
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|   } else {
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|     NewVR = GetValueInMiddleOfBlock(UseMI->getParent());
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|   }
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| 
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|   U.setReg(NewVR);
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| }
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| 
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| /// SSAUpdaterTraits<MachineSSAUpdater> - Traits for the SSAUpdaterImpl
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| /// template, specialized for MachineSSAUpdater.
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| namespace llvm {
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| template<>
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| class SSAUpdaterTraits<MachineSSAUpdater> {
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| public:
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|   typedef MachineBasicBlock BlkT;
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|   typedef unsigned ValT;
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|   typedef MachineInstr PhiT;
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| 
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|   typedef MachineBasicBlock::succ_iterator BlkSucc_iterator;
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|   static BlkSucc_iterator BlkSucc_begin(BlkT *BB) { return BB->succ_begin(); }
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|   static BlkSucc_iterator BlkSucc_end(BlkT *BB) { return BB->succ_end(); }
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| 
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|   /// Iterator for PHI operands.
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|   class PHI_iterator {
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|   private:
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|     MachineInstr *PHI;
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|     unsigned idx;
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|  
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|   public:
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|     explicit PHI_iterator(MachineInstr *P) // begin iterator
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|       : PHI(P), idx(1) {}
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|     PHI_iterator(MachineInstr *P, bool) // end iterator
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|       : PHI(P), idx(PHI->getNumOperands()) {}
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| 
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|     PHI_iterator &operator++() { idx += 2; return *this; } 
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|     bool operator==(const PHI_iterator& x) const { return idx == x.idx; }
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|     bool operator!=(const PHI_iterator& x) const { return !operator==(x); }
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|     unsigned getIncomingValue() { return PHI->getOperand(idx).getReg(); }
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|     MachineBasicBlock *getIncomingBlock() {
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|       return PHI->getOperand(idx+1).getMBB();
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|     }
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|   };
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|   static inline PHI_iterator PHI_begin(PhiT *PHI) { return PHI_iterator(PHI); }
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|   static inline PHI_iterator PHI_end(PhiT *PHI) {
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|     return PHI_iterator(PHI, true);
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|   }
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| 
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|   /// FindPredecessorBlocks - Put the predecessors of BB into the Preds
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|   /// vector.
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|   static void FindPredecessorBlocks(MachineBasicBlock *BB,
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|                                     SmallVectorImpl<MachineBasicBlock*> *Preds){
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|     for (MachineBasicBlock::pred_iterator PI = BB->pred_begin(),
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|            E = BB->pred_end(); PI != E; ++PI)
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|       Preds->push_back(*PI);
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|   }
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| 
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|   /// GetUndefVal - Create an IMPLICIT_DEF instruction with a new register.
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|   /// Add it into the specified block and return the register.
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|   static unsigned GetUndefVal(MachineBasicBlock *BB,
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|                               MachineSSAUpdater *Updater) {
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|     // Insert an implicit_def to represent an undef value.
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|     MachineInstr *NewDef = InsertNewDef(TargetOpcode::IMPLICIT_DEF,
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|                                         BB, BB->getFirstTerminator(),
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|                                         Updater->VRC, Updater->MRI,
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|                                         Updater->TII);
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|     return NewDef->getOperand(0).getReg();
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|   }
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| 
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|   /// CreateEmptyPHI - Create a PHI instruction that defines a new register.
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|   /// Add it into the specified block and return the register.
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|   static unsigned CreateEmptyPHI(MachineBasicBlock *BB, unsigned NumPreds,
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|                                  MachineSSAUpdater *Updater) {
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|     MachineBasicBlock::iterator Loc = BB->empty() ? BB->end() : BB->begin();
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|     MachineInstr *PHI = InsertNewDef(TargetOpcode::PHI, BB, Loc,
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|                                      Updater->VRC, Updater->MRI,
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|                                      Updater->TII);
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|     return PHI->getOperand(0).getReg();
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|   }
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| 
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|   /// AddPHIOperand - Add the specified value as an operand of the PHI for
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|   /// the specified predecessor block.
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|   static void AddPHIOperand(MachineInstr *PHI, unsigned Val,
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|                             MachineBasicBlock *Pred) {
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|     MachineInstrBuilder(*Pred->getParent(), PHI).addReg(Val).addMBB(Pred);
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|   }
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| 
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|   /// InstrIsPHI - Check if an instruction is a PHI.
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|   ///
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|   static MachineInstr *InstrIsPHI(MachineInstr *I) {
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|     if (I && I->isPHI())
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|       return I;
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|     return nullptr;
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|   }
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| 
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|   /// ValueIsPHI - Check if the instruction that defines the specified register
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|   /// is a PHI instruction.
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|   static MachineInstr *ValueIsPHI(unsigned Val, MachineSSAUpdater *Updater) {
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|     return InstrIsPHI(Updater->MRI->getVRegDef(Val));
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|   }
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| 
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|   /// ValueIsNewPHI - Like ValueIsPHI but also check if the PHI has no source
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|   /// operands, i.e., it was just added.
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|   static MachineInstr *ValueIsNewPHI(unsigned Val, MachineSSAUpdater *Updater) {
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|     MachineInstr *PHI = ValueIsPHI(Val, Updater);
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|     if (PHI && PHI->getNumOperands() <= 1)
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|       return PHI;
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|     return nullptr;
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|   }
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| 
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|   /// GetPHIValue - For the specified PHI instruction, return the register
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|   /// that it defines.
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|   static unsigned GetPHIValue(MachineInstr *PHI) {
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|     return PHI->getOperand(0).getReg();
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|   }
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| };
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| 
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| } // End llvm namespace
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| 
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| /// GetValueAtEndOfBlockInternal - Check to see if AvailableVals has an entry
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| /// for the specified BB and if so, return it.  If not, construct SSA form by
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| /// first calculating the required placement of PHIs and then inserting new
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| /// PHIs where needed.
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| unsigned MachineSSAUpdater::GetValueAtEndOfBlockInternal(MachineBasicBlock *BB){
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|   AvailableValsTy &AvailableVals = getAvailableVals(AV);
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|   if (unsigned V = AvailableVals[BB])
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|     return V;
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| 
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|   SSAUpdaterImpl<MachineSSAUpdater> Impl(this, &AvailableVals, InsertedPHIs);
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|   return Impl.GetValue(BB);
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| }
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