Evan Cheng f0a95356d6 Allow targets to select source order pre-RA scheduler. ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148033 91177308-0d34-0410-b5e6-96231b3b80d8

2012-01-12 18:27:52 +00:00

..

Mangler.h

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Target.td

Split AsmParser into two components - AsmParser and AsmParserVariant

2012-01-09 19:13:28 +00:00

TargetCallingConv.h

Minimize #include's and forward-declares in Target.

2011-12-10 22:35:47 +00:00

TargetCallingConv.td

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TargetData.h

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TargetELFWriterInfo.h

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TargetFrameLowering.h

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TargetInstrInfo.h

Add a if-conversion optimization that allows 'true' side of a diamond to be

2011-12-19 22:01:30 +00:00

TargetIntrinsicInfo.h

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TargetJITInfo.h

Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_anch

2011-12-20 02:50:00 +00:00

TargetLibraryInfo.h

Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_anch

2011-12-20 02:50:00 +00:00

TargetLowering.h

Allow targets to select source order pre-RA scheduler.

2012-01-12 18:27:52 +00:00

TargetLoweringObjectFile.h

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TargetMachine.h

Move Sched::Preference out of TargetMachine.h where it is not referenced.

2012-01-12 02:35:23 +00:00

TargetOpcodes.h

First chunk of MachineInstr bundle support.

2011-12-06 22:12:01 +00:00

TargetOptions.h

Move global variables in TargetMachine into new TargetOptions class. As an API

2011-12-02 22:16:29 +00:00

TargetRegisterInfo.h

Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_anch

2011-12-20 02:50:00 +00:00

TargetSchedule.td

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TargetSelectionDAG.td

Initial CodeGen support for CTTZ/CTLZ where a zero input produces an

2011-12-13 01:56:10 +00:00

TargetSelectionDAGInfo.h

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TargetSubtargetInfo.h

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